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Searched refs:UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_sh_mask.h2698 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_2_0_0_sh_mask.h2694 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_2_6_0_sh_mask.h51 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_3_0_0_sh_mask.h3756 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_5_0_0_sh_mask.h3700 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_4_0_5_sh_mask.h3868 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
H A Dvcn_4_0_3_sh_mask.h4037 #define UVD_VCPU_CACHE_SIZE3__CACHE_SIZE3_MASK 0x001FFFFFL macro
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