Searched refs:SOC15_REG_ENTRY_OFFSET (Results 1 – 7 of 7) sorted by relevance
382 ib->ptr[ib->length_dw++] = SOC15_REG_ENTRY_OFFSET(init_regs[i]) in gfx_v9_4_2_run_shader() 1510 WREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_2_query_sram_edc_count() 1515 data = RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_2_query_sram_edc_count() 1526 WREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_2_query_sram_edc_count() 1613 WREG32(SOC15_REG_ENTRY_OFFSET(blk->idx_reg), j); in gfx_v9_4_2_query_utc_edc_count() 1617 WREG32(SOC15_REG_ENTRY_OFFSET(blk->data_reg), in gfx_v9_4_2_query_utc_edc_count() 1622 data = RREG32(SOC15_REG_ENTRY_OFFSET(blk->data_reg)); in gfx_v9_4_2_query_utc_edc_count() 1632 WREG32(SOC15_REG_ENTRY_OFFSET(blk->data_reg), in gfx_v9_4_2_query_utc_edc_count() 1684 value = RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_2_reset_ea_err_status() 1687 WREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_4_2_ea_err_status_reg in gfx_v9_4_2_reset_ea_err_status() [all...]
1281 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_edc_cnt_regs[i])); in mmhub_v1_7_query_ras_error_count() 1298 WREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_edc_cnt_regs[i]), 0); in mmhub_v1_7_reset_ras_error_count() 1321 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_ea_err_status_regs[i])); in mmhub_v1_7_query_ras_error_status() 1340 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( in mmhub_v1_7_reset_ras_error_status() 1344 WREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_7_ea_err_status_regs[i]), in mmhub_v1_7_reset_ras_error_status()
886 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_query_ras_error_count() 920 RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_reset_ras_error_count() 990 reg_value = RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_4_query_ras_error_status()
807 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_0_edc_cnt_regs[i])); in mmhub_v1_0_query_ras_error_count() 825 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v1_0_edc_cnt_regs[i])); in mmhub_v1_0_reset_ras_error_count()
1642 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v9_4_edc_cnt_regs[i])); in mmhub_v9_4_query_ras_error_count() 1659 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v9_4_edc_cnt_regs[i])); in mmhub_v9_4_reset_ras_error_count() 1684 RREG32(SOC15_REG_ENTRY_OFFSET(mmhub_v9_4_err_status_regs[i])); in mmhub_v9_4_query_ras_error_status()
4691 ib.ptr[ib.length_dw++] = SOC15_REG_ENTRY_OFFSET(vgpr_init_regs_ptr[i]) in gfx_v9_0_do_edc_gpr_workarounds() 4719 ib.ptr[ib.length_dw++] = SOC15_REG_ENTRY_OFFSET(sgpr1_init_regs[i]) in gfx_v9_0_do_edc_gpr_workarounds() 4747 ib.ptr[ib.length_dw++] = SOC15_REG_ENTRY_OFFSET(sgpr2_init_regs[i]) in gfx_v9_0_do_edc_gpr_workarounds() 7001 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_reset_ras_error_count() 7064 RREG32(SOC15_REG_ENTRY_OFFSET(gfx_v9_0_edc_counter_regs[i])); in gfx_v9_0_query_ras_error_count() 7305 adev->gfx.ip_dump_core[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_9[i])); in gfx_v9_ip_dump() 7327 RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v9_ip_dump()
5187 adev->gfx.ip_dump_core[i] = RREG32(SOC15_REG_ENTRY_OFFSET(gc_reg_list_12_0[i])); in gfx_v12_ip_dump() 5204 RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v12_ip_dump() 5230 RREG32(SOC15_REG_ENTRY_OFFSET( in gfx_v12_ip_dump()