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Searched refs:SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h846 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
H A Dsdma0_4_0_sh_mask.h847 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
H A Dsdma0_4_2_sh_mask.h863 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
H A Dsdma0_4_2_2_sh_mask.h869 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h558 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00100000L macro
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/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h562 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00010000L macro
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H A Dgc_10_3_0_sh_mask.h527 #define SDMA0_UTCL1_WR_STATUS__REQL2_IDLE_MASK 0x00010000L macro
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