Searched refs:SATA_PLL_CFG0 (Results 1 – 2 of 2) sorted by relevance
179 #define SATA_PLL_CFG0 0x490 macro 570 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_control_enable() 574 writel_relaxed(val, clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_control_enable() 582 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_sequence_start() 584 writel_relaxed(val, clk_base + SATA_PLL_CFG0); in tegra210_sata_pll_hw_sequence_start() 592 val = readl_relaxed(clk_base + SATA_PLL_CFG0); in tegra210_set_sata_pll_seq_sw() 604 writel_relaxed(val, clk_base + SATA_PLL_CFG0); in tegra210_set_sata_pll_seq_sw()
110 #define SATA_PLL_CFG0 0x490 macro 1701 val = pll_readl(SATA_PLL_CFG0, pll); in clk_plle_tegra114_enable() 1705 pll_writel(val, SATA_PLL_CFG0, pll); in clk_plle_tegra114_enable() 1709 val = pll_readl(SATA_PLL_CFG0, pll); in clk_plle_tegra114_enable() 1711 pll_writel(val, SATA_PLL_CFG0, pll); in clk_plle_tegra114_enable()