Searched refs:RISCV_IOMMU_MSI_CFG_TBL_ADDR (Results 1 – 2 of 2) sorted by relevance
31 if (addr != (addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR)) { in riscv_iommu_write_msi_msg() 34 addr, addr & RISCV_IOMMU_MSI_CFG_TBL_ADDR); in riscv_iommu_write_msi_msg() 37 addr &= RISCV_IOMMU_MSI_CFG_TBL_ADDR; in riscv_iommu_write_msi_msg()
285 #define RISCV_IOMMU_MSI_CFG_TBL_ADDR GENMASK_ULL(55, 2) macro