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Searched refs:vmw_write (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_drv.c427 vmw_write(dev_priv, SVGA_REG_ENABLE, SVGA_REG_ENABLE_ENABLE | in vmw_device_init()
433 vmw_write(dev_priv, SVGA_REG_TRACES, uses_fb_traces); in vmw_device_init()
440 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1); in vmw_device_init()
455 vmw_write(vmw, SVGA_REG_SYNC, SVGA_SYNC_GENERIC); in vmw_device_fini()
461 vmw_write(vmw, SVGA_REG_CONFIG_DONE, in vmw_device_fini()
463 vmw_write(vmw, SVGA_REG_ENABLE, in vmw_device_fini()
465 vmw_write(vmw, SVGA_REG_TRACES, in vmw_device_fini()
781 vmw_write(dev, SVGA_REG_ID, vmw_is_svga_v3(dev) ? in vmw_detect_version()
799 vmw_write(dev, SVGA_REG_GUEST_DRIVER_ID, in vmw_write_driver_id()
802 vmw_write(de in vmw_write_driver_id()
[all...]
H A Dvmwgfx_ldu.c117 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, in vmw_ldu_commit_list()
124 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i); in vmw_ldu_commit_list()
125 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i); in vmw_ldu_commit_list()
126 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); in vmw_ldu_commit_list()
127 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y); in vmw_ldu_commit_list()
128 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay); in vmw_ldu_commit_list()
129 vmw_write(dev_priv, SVGA_REG_DISPLAY_HEIGHT, crtc->mode.vdisplay); in vmw_ldu_commit_list()
H A Dvmwgfx_cursor_plane.c131 vmw_write(vmw, SVGA_REG_CURSOR_MOBID, vmw_bo_mobid(vps->cursor.mob)); in vmw_cursor_update_mob()
295 vmw_write(dev_priv, SVGA_REG_CURSOR4_X, x); in vmw_cursor_update_position()
296 vmw_write(dev_priv, SVGA_REG_CURSOR4_Y, y); in vmw_cursor_update_position()
297 vmw_write(dev_priv, SVGA_REG_CURSOR4_SCREEN_ID, SVGA3D_INVALID_ID); in vmw_cursor_update_position()
298 vmw_write(dev_priv, SVGA_REG_CURSOR4_ON, svga_cursor_on); in vmw_cursor_update_position()
299 vmw_write(dev_priv, SVGA_REG_CURSOR4_SUBMIT, 1); in vmw_cursor_update_position()
307 vmw_write(dev_priv, SVGA_REG_CURSOR_X, x); in vmw_cursor_update_position()
308 vmw_write(dev_priv, SVGA_REG_CURSOR_Y, y); in vmw_cursor_update_position()
309 vmw_write(dev_priv, SVGA_REG_CURSOR_ON, svga_cursor_on); in vmw_cursor_update_position()
H A Dvmwgfx_irq.c242 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_add()
257 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_generic_waiter_remove()
307 vmw_write(dev_priv, SVGA_REG_IRQMASK, 0); in vmw_irq_uninstall()
H A Dvmwgfx_devcaps.c96 vmw_write(vmw, SVGA_REG_DEV_CAP, i); in vmw_devcaps_create()
H A Dvmwgfx_kms.c1211 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch); in vmw_kms_write_svga()
1214 vmw_write(vmw_priv, SVGA_REG_WIDTH, width); in vmw_kms_write_svga()
1215 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height); in vmw_kms_write_svga()
1217 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp); in vmw_kms_write_svga()
1328 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8); in vmw_du_crtc_gamma_set()
1329 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8); in vmw_du_crtc_gamma_set()
1330 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8); in vmw_du_crtc_gamma_set()
H A Dvmwgfx_cmd.c138 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1); in vmw_fifo_create()
163 vmw_write(dev_priv, SVGA_REG_SYNC, reason); in vmw_fifo_ping_host()
H A Dvmwgfx_cmdbuf.c307 vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val); in vmw_cmdbuf_header_submit()
311 vmw_write(man->dev_priv, SVGA_REG_COMMAND_LOW, val); in vmw_cmdbuf_header_submit()
H A Dvmwgfx_drv.h645 static inline void vmw_write(struct vmw_private *dev_priv, in vmw_write() function
1477 vmw_write(vmw, SVGA_REG_IRQ_STATUS, status); in vmw_irq_status_write()