| /linux/drivers/crypto/intel/qat/qat_dh895xcc/ |
| H A D | adf_dh895xcc_hw_data.c | 123 static void enable_vf2pf_interrupts(void __iomem *pmisc_addr, u32 vf_mask) in enable_vf2pf_interrupts() argument
127 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in enable_vf2pf_interrupts()
129 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in enable_vf2pf_interrupts()
134 u32 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in enable_vf2pf_interrupts()
136 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in enable_vf2pf_interrupts()
140 static void disable_all_vf2pf_interrupts(void __iomem *pmisc_addr) in disable_all_vf2pf_interrupts() argument
145 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK3) in disable_all_vf2pf_interrupts()
147 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in disable_all_vf2pf_interrupts()
150 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_ERRMSK5) in disable_all_vf2pf_interrupts()
152 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK in disable_all_vf2pf_interrupts()
155 disable_pending_vf2pf_interrupts(void __iomem * pmisc_addr) disable_pending_vf2pf_interrupts() argument
[all...] |
| /linux/drivers/crypto/intel/qat/qat_common/ |
| H A D | adf_gen2_hw_data.c | 31 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen2_enable_error_correction() local
38 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i)); in adf_gen2_enable_error_correction()
40 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i), val); in adf_gen2_enable_error_correction()
41 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i)); in adf_gen2_enable_error_correction()
43 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i), val); in adf_gen2_enable_error_correction()
48 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_UERRSSMSH(i)); in adf_gen2_enable_error_correction()
50 ADF_CSR_WR(pmisc_addr, ADF_GEN2_UERRSSMSH(i), val); in adf_gen2_enable_error_correction()
51 val = ADF_CSR_RD(pmisc_addr, ADF_GEN2_CERRSSMSH(i)); in adf_gen2_enable_error_correction()
53 ADF_CSR_WR(pmisc_addr, ADF_GEN2_CERRSSMSH(i), val); in adf_gen2_enable_error_correction()
61 void __iomem *pmisc_addr in adf_gen2_cfg_iov_thds() local
159 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); adf_gen2_set_ssm_wdtimer() local
[all...] |
| H A D | adf_isr.c | 61 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_enable_vf2pf_interrupts() local
65 GET_PFVF_OPS(accel_dev)->enable_vf2pf_interrupts(pmisc_addr, vf_mask); in adf_enable_vf2pf_interrupts()
71 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_all_vf2pf_interrupts() local
75 GET_PFVF_OPS(accel_dev)->disable_all_vf2pf_interrupts(pmisc_addr); in adf_disable_all_vf2pf_interrupts()
81 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_disable_pending_vf2pf_interrupts() local
85 pending = GET_PFVF_OPS(accel_dev)->disable_pending_vf2pf_interrupts(pmisc_addr); in adf_disable_pending_vf2pf_interrupts()
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| H A D | adf_rl.c | 267 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_rps_to_leaf() local
275 ADF_CSR_WR(pmisc_addr, offset, node_id); in assign_rps_to_leaf()
283 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_leaf_to_cluster() local
290 ADF_CSR_WR(pmisc_addr, offset, parent_id); in assign_leaf_to_cluster()
297 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in assign_cluster_to_root() local
304 ADF_CSR_WR(pmisc_addr, offset, parent_id); in assign_cluster_to_root()
1087 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_rl_start() local
1102 ADF_CSR_WR(pmisc_addr, rl_hw_data->pciin_tb_offset, in adf_rl_start()
1104 ADF_CSR_WR(pmisc_addr, rl_hw_data->pciout_tb_offset, in adf_rl_start()
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| H A D | qat_hal.c | 687 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in qat_hal_chip_init() local
726 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET_4XXX; in qat_hal_chip_init()
727 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET_4XXX; in qat_hal_chip_init()
728 handle->hal_ep_csr_addr_v = pmisc_addr + ICP_QAT_EP_OFFSET_4XXX; in qat_hal_chip_init()
754 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET; in qat_hal_chip_init()
755 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET; in qat_hal_chip_init()
756 handle->hal_ep_csr_addr_v = pmisc_addr + ICP_QAT_EP_OFFSET; in qat_hal_chip_init()
781 handle->hal_cap_g_ctl_csr_addr_v = pmisc_addr + ICP_QAT_CAP_OFFSET; in qat_hal_chip_init()
782 handle->hal_cap_ae_xfer_csr_addr_v = pmisc_addr + ICP_QAT_AE_OFFSET; in qat_hal_chip_init()
783 handle->hal_ep_csr_addr_v = pmisc_addr in qat_hal_chip_init()
[all...] |
| H A D | adf_gen4_hw_data.c | 145 void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev); in adf_gen4_set_ssm_wdtimer() local
150 ADF_CSR_WR64_LO_HI(pmisc_addr, ADF_SSMWDTL_OFFSET, ADF_SSMWDTH_OFFSET, timer_val); in adf_gen4_set_ssm_wdtimer()
153 ADF_CSR_WR64_LO_HI(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ADF_SSMWDTPKEH_OFFSET, in adf_gen4_set_ssm_wdtimer()
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| H A D | adf_accel_devices.h | 233 void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
234 void (*disable_all_vf2pf_interrupts)(void __iomem *pmisc_addr);
235 u32 (*disable_pending_vf2pf_interrupts)(void __iomem *pmisc_addr);
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