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Searched refs:drm_dbg_dp (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/display/include/
H A Dlogger_types.h41 #define DC_LOG_HW_HPD_IRQ(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
42 #define DC_LOG_MST(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
48 #define DC_LOG_BACKLIGHT(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
50 #define DC_LOG_DETECTION_DP_CAPS(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
55 drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
56 #define DC_LOG_EVENT_LINK_LOSS(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
63 #define DC_LOG_DSC(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
66 #define DC_LOG_DP2(...) drm_dbg_dp((DC_LOGGER)->dev, __VA_ARGS__)
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_link.c136 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_1 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
143 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_2 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
151 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_3 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
158 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_4 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
165 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_5 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
172 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_6 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
179 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_7 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
186 drm_dbg_dp(link->drm_dev, "test_audio_period_ch_8 = 0x%x\n", ret); in msm_dp_link_parse_audio_channel_period()
213 drm_dbg_dp(link->drm_dev, "audio pattern type = 0x%x\n", data); in msm_dp_link_parse_audio_pattern_type()
254 drm_dbg_dp(lin in msm_dp_link_parse_audio_mode()
[all...]
H A Ddp_panel.c80 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_read_psr_cap()
129 drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); in msm_dp_panel_read_dpcd()
130 drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate); in msm_dp_panel_read_dpcd()
131 drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes); in msm_dp_panel_read_dpcd()
176 drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n", in msm_dp_panel_read_sink_caps()
360 drm_dbg_dp(panel->drm_dev, "%s: enabled tpg\n", __func__); in msm_dp_panel_tpg_enable()
385 drm_dbg_dp(panel->drm_dev, in msm_dp_panel_tpg_config()
395 drm_dbg_dp(panel->drm_dev, "calling panel's tpg_enable\n"); in msm_dp_panel_tpg_config()
457 drm_dbg_dp(panel->drm_dev, "vsc sdp enable=1\n"); in msm_dp_panel_enable_vsc_sdp()
484 drm_dbg_dp(pane in msm_dp_panel_disable_vsc_sdp()
[all...]
H A Ddp_ctrl.c306 drm_dbg_dp(ctrl->drm_dev, "enable\n"); in msm_dp_ctrl_mainlink_enable()
329 drm_dbg_dp(ctrl->drm_dev, "disable\n"); in msm_dp_ctrl_mainlink_disable()
380 drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); in msm_dp_ctrl_push_idle()
419 drm_dbg_dp(ctrl->drm_dev, "DP_CONFIGURATION_CTRL=0x%x\n", config); in msm_dp_ctrl_config_ctrl()
459 drm_dbg_dp(ctrl->drm_dev, "misc settings = 0x%x\n", misc_val); in msm_dp_ctrl_configure_source_params()
982 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
1018 drm_dbg_dp(ctrl->drm_dev, in _dp_ctrl_calc_tu()
1213 drm_dbg_dp(ctrl->drm_dev, "TU: valid_boundary_link: %d\n", in _dp_ctrl_calc_tu()
1215 drm_dbg_dp(ctrl->drm_dev, "TU: delay_start_link: %d\n", in _dp_ctrl_calc_tu()
1217 drm_dbg_dp(ctr in _dp_ctrl_calc_tu()
[all...]
H A Ddp_audio.c147 drm_dbg_dp(audio->drm_dev, "sdp_cfg = 0x%x\n", sdp_cfg); in msm_dp_audio_config_sdp()
157 drm_dbg_dp(audio->drm_dev, "sdp_cfg2 = 0x%x\n", sdp_cfg2); in msm_dp_audio_config_sdp()
191 drm_dbg_dp(audio->drm_dev, "Unknown link rate\n"); in msm_dp_audio_setup_acr()
198 drm_dbg_dp(audio->drm_dev, "select: %#x, acr_ctrl: %#x\n", in msm_dp_audio_setup_acr()
220 drm_dbg_dp(audio->drm_dev, in msm_dp_audio_safe_to_exit_level()
230 drm_dbg_dp(audio->drm_dev, in msm_dp_audio_safe_to_exit_level()
248 drm_dbg_dp(audio->drm_dev, "dp_audio_cfg = 0x%x\n", audio_ctrl); in msm_dp_audio_enable()
H A Ddp_drm.c30 drm_dbg_dp(dp->drm_dev, "link_ready = %s\n", in msm_dp_bridge_detect()
46 drm_dbg_dp(dp->drm_dev, "link_ready = %s\n", in msm_dp_bridge_atomic_check()
91 drm_dbg_dp(connector->dev, "No sink connected\n"); in msm_dp_bridge_get_modes()
/linux/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c47 drm_dbg_dp(dp->dev, "dp aux write link rate and lanes failed, ret: %d\n", ret); in hibmc_dp_link_training_configure()
56 drm_dbg_dp(dp->dev, "dp aux write 8b/10b and downspread failed, ret: %d\n", ret); in hibmc_dp_link_training_configure()
101 drm_dbg_dp(dp->dev, "dp aux write training pattern set failed\n"); in hibmc_dp_link_set_pattern()
131 drm_dbg_dp(dp->dev, "dp aux write training lane set failed\n"); in hibmc_dp_link_training_cr_pre()
186 drm_dbg_dp(dp->dev, "dp link training reduce to 1 lane\n"); in hibmc_dp_link_reduce_lane()
222 drm_dbg_dp(dp->dev, "dp link training cr done\n"); in hibmc_dp_link_training_cr()
228 drm_dbg_dp(dp->dev, "same voltage tries 5 times\n"); in hibmc_dp_link_training_cr()
242 drm_dbg_dp(dp->dev, "Update link training failed\n"); in hibmc_dp_link_training_cr()
275 drm_dbg_dp(dp->dev, "clock recovery check failed\n"); in hibmc_dp_link_training_channel_eq()
276 drm_dbg_dp(d in hibmc_dp_link_training_channel_eq()
[all...]
H A Ddp_serdes.c35 drm_dbg_dp(dp->dev, "dp serdes cfg failed\n"); in hibmc_dp_serdes_set_tx_cfg()
50 drm_dbg_dp(dp->dev, "dp serdes rate switching failed\n"); in hibmc_dp_serdes_rate_switch()
55 drm_dbg_dp(dp->dev, "reducing serdes rate to :%d\n", in hibmc_dp_serdes_rate_switch()
H A Ddp_hw.c38 drm_dbg_dp(dp->dev, "tu value: %u.%u value: %u\n", in hibmc_dp_set_tu()
67 drm_dbg_dp(dp->dev, "h_active %u v_active %u htotal_size %u hblank_size %u", in hibmc_dp_set_sst()
69 drm_dbg_dp(dp->dev, "flink_clock %u pixel_clock %d", fclk, mode->clock / 1000); in hibmc_dp_set_sst()
293 drm_dbg_dp(dp->drm_dev, "r:%x g:%x b:%x\n", raw_data.r_value, in hibmc_dp_set_cbar()
/linux/drivers/gpu/drm/hisilicon/hibmc/
H A Dhibmc_drm_dp.c124 drm_dbg_dp(&priv->dev, "HPD IN isr occur!\n"); in hibmc_dp_hpd_isr()
127 drm_dbg_dp(&priv->dev, "HPD OUT isr occur!\n"); in hibmc_dp_hpd_isr()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c110 drm_dbg_dp(adev_to_drm(adev), "AUX partially written\n"); in dm_dp_aux_transfer()
136 drm_dbg_dp(adev_to_drm(adev), "DP AUX transfer fail:%d\n", operation_result); in dm_dp_aux_transfer()
140 drm_dbg_dp(adev_to_drm(adev), "AUX reply command not ACK: 0x%02x.", in dm_dp_aux_transfer()
216 drm_dbg_dp(connector->dev, in amdgpu_dm_mst_connector_early_unregister()
373 drm_dbg_dp(connector->dev, in dm_dp_mst_get_modes()
414 drm_dbg_dp(connector->dev, in dm_dp_mst_get_modes()
535 drm_dbg_dp(connector->dev, in dm_dp_mst_detect()
/linux/include/drm/
H A Ddrm_print.h664 #define drm_dbg_dp(drm, fmt, ...) \ macro
749 /* NOTE: this is deprecated in favor of drm_dbg_dp(NULL, ...). */
/linux/drivers/gpu/drm/display/
H A Ddrm_dp_helper.c562 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d) %*ph\n", in drm_dp_dump_access()
565 drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d)\n", in drm_dp_dump_access()
3340 drm_dbg_dp(aux->drm_dev, in drm_dp_as_sdp_supported()
3364 drm_dbg_dp(aux->drm_dev, "failed to read DP_DPRX_FEATURE_ENUMERATION_LIST\n"); in drm_dp_vsc_sdp_supported()