xref: /linux/drivers/gpu/drm/amd/display/dc/dm_helpers.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 /**
27  * This file defines helper functions provided by the Display Manager to
28  * Display Core.
29  */
30 #ifndef __DM_HELPERS__
31 #define __DM_HELPERS__
32 
33 #include "dc_types.h"
34 #include "dc.h"
35 
36 struct dc_dp_mst_stream_allocation_table;
37 struct aux_payload;
38 enum aux_return_code_type;
39 enum set_config_status;
40 
41 /*
42  * Allocate memory accessible by the GPU
43  *
44  * frame buffer allocations must be aligned to a 4096-byte boundary
45  *
46  * Returns virtual address, sets addr to physical address
47  */
48 void *dm_helpers_allocate_gpu_mem(
49 		struct dc_context *ctx,
50 		enum dc_gpu_mem_alloc_type type,
51 		size_t size,
52 		long long *addr);
53 
54 /*
55  * Free the GPU-accessible memory at the virtual address pvMem
56  */
57 void dm_helpers_free_gpu_mem(
58 		struct dc_context *ctx,
59 		enum dc_gpu_mem_alloc_type type,
60 		void *pvMem);
61 
62 enum dc_edid_status dm_helpers_parse_edid_caps(
63 	struct dc_link *link,
64 	const struct dc_edid *edid,
65 	struct dc_edid_caps *edid_caps);
66 
67 
68 /*
69  * Update DP branch info
70  */
71 void dm_helpers_dp_update_branch_info(
72 		struct dc_context *ctx,
73 		const struct dc_link *link);
74 
75 /*
76  * Writes payload allocation table in immediate downstream device.
77  */
78 bool dm_helpers_dp_mst_write_payload_allocation_table(
79 		struct dc_context *ctx,
80 		const struct dc_stream_state *stream,
81 		struct dc_dp_mst_stream_allocation_table *proposed_table,
82 		bool enable);
83 
84 /*
85  * poll pending down reply
86  */
87 void dm_helpers_dp_mst_poll_pending_down_reply(
88 	struct dc_context *ctx,
89 	const struct dc_link *link);
90 
91 /*
92  * Clear payload allocation table before enable MST DP link.
93  */
94 void dm_helpers_dp_mst_clear_payload_allocation_table(
95 	struct dc_context *ctx,
96 	const struct dc_link *link);
97 
98 /*
99  * Polls for ACT (allocation change trigger) handled and
100  */
101 enum act_return_status dm_helpers_dp_mst_poll_for_allocation_change_trigger(
102 		struct dc_context *ctx,
103 		const struct dc_stream_state *stream);
104 /*
105  * Sends ALLOCATE_PAYLOAD message.
106  */
107 void dm_helpers_dp_mst_send_payload_allocation(
108 		struct dc_context *ctx,
109 		const struct dc_stream_state *stream);
110 
111 /*
112  * Update mst manager relevant variables
113  */
114 void dm_helpers_dp_mst_update_mst_mgr_for_deallocation(
115 		struct dc_context *ctx,
116 		const struct dc_stream_state *stream);
117 
118 bool dm_helpers_dp_mst_start_top_mgr(
119 		struct dc_context *ctx,
120 		const struct dc_link *link,
121 		bool boot);
122 
123 bool dm_helpers_dp_mst_stop_top_mgr(
124 		struct dc_context *ctx,
125 		struct dc_link *link);
126 
127 void dm_helpers_dp_mst_update_branch_bandwidth(
128 		struct dc_context *ctx,
129 		struct dc_link *link);
130 
131 /**
132  * OS specific aux read callback.
133  */
134 bool dm_helpers_dp_read_dpcd(
135 		struct dc_context *ctx,
136 		const struct dc_link *link,
137 		uint32_t address,
138 		uint8_t *data,
139 		uint32_t size);
140 
141 /**
142  * OS specific aux write callback.
143  */
144 bool dm_helpers_dp_write_dpcd(
145 		struct dc_context *ctx,
146 		const struct dc_link *link,
147 		uint32_t address,
148 		const uint8_t *data,
149 		uint32_t size);
150 
151 bool dm_helpers_submit_i2c(
152 		struct dc_context *ctx,
153 		const struct dc_link *link,
154 		struct i2c_command *cmd);
155 
156 bool dm_helpers_execute_fused_io(
157 		struct dc_context *ctx,
158 		struct dc_link *link,
159 		union dmub_rb_cmd *commands,
160 		uint8_t count,
161 		uint32_t timeout_us
162 );
163 
164 bool dm_helpers_dp_write_dsc_enable(
165 		struct dc_context *ctx,
166 		const struct dc_stream_state *stream,
167 		bool enable
168 );
169 
170 bool dm_helpers_dp_write_hblank_reduction(
171 		struct dc_context *ctx,
172 		const struct dc_stream_state *stream);
173 
174 bool dm_helpers_is_dp_sink_present(
175 		struct dc_link *link);
176 
177 void dm_helpers_mst_enable_stream_features(const struct dc_stream_state *stream);
178 
179 enum dc_edid_status dm_helpers_read_local_edid(
180 		struct dc_context *ctx,
181 		struct dc_link *link,
182 		struct dc_sink *sink);
183 
184 bool dm_helpers_dp_handle_test_pattern_request(
185 		struct dc_context *ctx,
186 		const struct dc_link *link,
187 		union link_test_pattern dpcd_test_pattern,
188 		union test_misc dpcd_test_params);
189 
190 void dm_set_dcn_clocks(
191 		struct dc_context *ctx,
192 		struct dc_clocks *clks);
193 
194 void dm_helpers_enable_periodic_detection(struct dc_context *ctx, bool enable);
195 
196 void dm_set_phyd32clk(struct dc_context *ctx, int freq_khz);
197 
198 bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enable);
199 
200 void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us);
201 
202 // 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy
203 #define IS_SMU_TIMEOUT(result) \
204 	(result == 0x0)
205 void dm_helpers_init_panel_settings(
206 	struct dc_context *ctx,
207 	struct dc_panel_config *config,
208 	struct dc_sink *sink);
209 void dm_helpers_override_panel_settings(
210 	struct dc_context *ctx,
211 	struct dc_panel_config *config);
212 int dm_helper_dmub_aux_transfer_sync(
213 		struct dc_context *ctx,
214 		const struct dc_link *link,
215 		struct aux_payload *payload,
216 		enum aux_return_code_type *operation_result);
217 
218 int dm_helpers_dmub_set_config_sync(struct dc_context *ctx,
219 		const struct dc_link *link,
220 		struct set_config_cmd_payload *payload,
221 		enum set_config_status *operation_result);
222 enum adaptive_sync_type dm_get_adaptive_sync_support_type(struct dc_link *link);
223 
224 enum dc_edid_status dm_helpers_get_sbios_edid(struct dc_link *link, struct dc_edid *edid);
225 
226 bool dm_helpers_is_fullscreen(struct dc_context *ctx, struct dc_stream_state *stream);
227 bool dm_helpers_is_hdr_on(struct dc_context *ctx, struct dc_stream_state *stream);
228 
229 #endif /* __DM_HELPERS__ */
230