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Searched refs:dev_base (Results 1 – 7 of 7) sorted by relevance

/linux/arch/x86/kernel/
H A Daperture_64.c318 int dev_base, dev_limit; in early_gart_iommu_check() local
321 dev_base = amd_nb_bus_dev_ranges[i].dev_base; in early_gart_iommu_check()
324 for (slot = dev_base; slot < dev_limit; slot++) { in early_gart_iommu_check()
374 int dev_base, dev_limit; in early_gart_iommu_check() local
377 dev_base = amd_nb_bus_dev_ranges[i].dev_base; in early_gart_iommu_check()
380 for (slot = dev_base; slot < dev_limit; slot++) { in early_gart_iommu_check()
418 int dev_base, dev_limit; in gart_iommu_hole_init() local
422 dev_base in gart_iommu_hole_init()
540 int bus, dev_base, dev_limit; gart_iommu_hole_init() local
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/linux/arch/x86/pci/
H A Dmmconfig_32.c41 u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12); in pci_exp_set_dev_base() local
43 if (dev_base != mmcfg_last_accessed_device || in pci_exp_set_dev_base()
45 mmcfg_last_accessed_device = dev_base; in pci_exp_set_dev_base()
47 set_fixmap_nocache(FIX_PCIE_MCFG, dev_base); in pci_exp_set_dev_base()
H A Damd_bus.c359 u8 slot = amd_nb_bus_dev_ranges[i].dev_base; in pci_enable_pci_io_ecs()
/linux/drivers/power/reset/
H A Dat91-reset.c72 * @dev_base: base address for devices reset
84 void __iomem *dev_base; member
264 val = readl_relaxed(reset->dev_base); in at91_reset_update()
269 writel_relaxed(val, reset->dev_base); in at91_reset_update()
293 val = readl_relaxed(reset->dev_base); in at91_reset_dev_status()
323 reset->dev_base = devm_of_iomap(&pdev->dev, pdev->dev.of_node, 1, in at91_rcdev_init()
325 if (IS_ERR(reset->dev_base)) in at91_rcdev_init()
/linux/arch/x86/include/asm/amd/
H A Dnb.h11 u8 dev_base; member
/linux/drivers/dma/amd/qdma/
H A Dqdma.h225 dma_addr_t dev_base; member
H A Dqdma.c973 &ring->dev_base, GFP_KERNEL); in qdmam_alloc_qintr_rings()
978 intr_ctxt.agg_base = QDMA_INTR_RING_BASE(ring->dev_base); in qdmam_alloc_qintr_rings()