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Searched refs:SCL_MODE (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_transform.c125 REG_UPDATE_2(SCL_MODE, SCL_MODE, 0, SCL_PSCL_EN, 0); in setup_scaling_configuration()
127 REG_UPDATE(SCL_MODE, SCL_MODE, 0); in setup_scaling_configuration()
136 REG_UPDATE(SCL_MODE, SCL_MODE, 1); in setup_scaling_configuration()
138 REG_UPDATE(SCL_MODE, SCL_MODE, 2); in setup_scaling_configuration()
141 REG_UPDATE(SCL_MODE, SCL_PSCL_EN, 1); in setup_scaling_configuration()
159 /* DCE6 has no SCL_MODE registe in dce60_setup_scaling_configuration()
[all...]
H A Ddce_transform.h76 SRI(SCL_MODE, SCL, id), \
221 XFM_SF(SCL_MODE, SCL_MODE, mask_sh), \
267 XFM_SF(SCL_MODE, SCL_PSCL_EN, mask_sh)
391 XFM_SF(SCL0_SCL_MODE, SCL_MODE, mask_sh), \
481 type SCL_MODE; \
575 uint32_t SCL_MODE; member
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_transform_v.c177 set_reg_field_value(value, 1, SCLV_MODE, SCL_MODE); in setup_scaling_configuration()
181 set_reg_field_value(value, 0, SCLV_MODE, SCL_MODE); in setup_scaling_configuration()
192 get_reg_field_value(value, SCLV_MODE, SCL_MODE), in setup_scaling_configuration()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_dscl.c334 uint32_t scl_mode = REG_READ(SCL_MODE); in dpp1_dscl_set_scl_filter()
368 REG_SET_2(SCL_MODE, scl_mode, in dpp1_dscl_set_scl_filter()
656 REG_UPDATE(SCL_MODE, DSCL_MODE, dscl_mode); in dpp1_dscl_set_scaler_manual_scale()
H A Ddcn10_dpp.h58 SRI(SCL_MODE, DSCL, id), \
1111 uint32_t SCL_MODE; \
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/
H A Ddcn401_dpp_dscl.c348 uint32_t scl_mode = REG_READ(SCL_MODE); in dpp401_dscl_set_scl_filter()
382 REG_SET_2(SCL_MODE, scl_mode, in dpp401_dscl_set_scl_filter()
1140 REG_UPDATE(SCL_MODE, DSCL_MODE, dscl_mode); in dpp401_dscl_set_scaler_manual_scale()
/linux/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp.h101 SRI(SCL_MODE, DSCL, id), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.h283 SRI_ARR(SCL_MODE, DSCL, id), SRI_ARR(LB_DATA_FORMAT, DSCL, id), \
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/
H A Ddcn32_resource.h484 SRI_ARR(SCL_MODE, DSCL, id), SRI_ARR(LB_DATA_FORMAT, DSCL, id), \