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Searched refs:REG_CTRL (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/pwm/
H A Dpwm-vt8500.c28 #define REG_CTRL(pwm) (((pwm) << 4) + 0x00) macro
117 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
119 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_config()
138 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
140 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_enable()
151 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
153 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_disable()
166 val = readl(vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
173 writel(val, vt8500->base + REG_CTRL(pwm->hwpwm)); in vt8500_pwm_set_polarity()
/linux/drivers/video/backlight/
H A Dlm3630a_bl.c19 #define REG_CTRL 0x00 macro
101 rval |= lm3630a_update(pchip, REG_CTRL, 0x14, pdata->leda_ctrl); in lm3630a_chip_init()
102 rval |= lm3630a_update(pchip, REG_CTRL, 0x0B, pdata->ledb_ctrl); in lm3630a_chip_init()
139 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_isr_func()
200 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_update_status()
209 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDA_ENABLE, 0); in lm3630a_bank_a_update_status()
211 ret |= lm3630a_update(pchip, REG_CTRL, in lm3630a_bank_a_update_status()
241 rval = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_a_get_brightness()
275 ret = lm3630a_update(pchip, REG_CTRL, 0x80, 0x00); in lm3630a_bank_b_update_status()
284 ret |= lm3630a_update(pchip, REG_CTRL, LM3630A_LEDB_ENABL in lm3630a_bank_b_update_status()
[all...]
/linux/drivers/phy/amlogic/
H A Dphy-meson8b-usb2.c28 #define REG_CTRL 0x04 macro
170 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_REF_CLK_SEL_MASK, in phy_meson8b_usb2_power_on()
173 regmap_update_bits(priv->regmap, REG_CTRL, REG_CTRL_FSEL_MASK, in phy_meson8b_usb2_power_on()
177 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET); in phy_meson8b_usb2_power_on()
179 regmap_clear_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET); in phy_meson8b_usb2_power_on()
182 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_SOF_TOGGLE_OUT); in phy_meson8b_usb2_power_on()
221 regmap_set_bits(priv->regmap, REG_CTRL, REG_CTRL_POWER_ON_RESET); in phy_meson8b_usb2_power_off()
/linux/drivers/clk/
H A Dclk-apple-nco.c23 #define REG_CTRL 0 macro
82 val = readl_relaxed(chan->base + REG_CTRL); in applnco_enable_nolock()
83 writel_relaxed(val | CTRL_ENABLE, chan->base + REG_CTRL); in applnco_enable_nolock()
91 val = readl_relaxed(chan->base + REG_CTRL); in applnco_disable_nolock()
92 writel_relaxed(val & ~CTRL_ENABLE, chan->base + REG_CTRL); in applnco_disable_nolock()
99 return (readl_relaxed(chan->base + REG_CTRL) & CTRL_ENABLE) != 0; in applnco_is_enabled()
/linux/drivers/video/fbdev/
H A Dxilinxfb.c56 * i.e. REG_CTRL. So this is taken care in the function
62 #define REG_CTRL 1 macro
234 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinx_fb_blank()
242 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinx_fb_blank()
312 xilinx_fb_out32(drvdata, REG_CTRL, drvdata->reg_ctrl_default); in xilinxfb_assign()
369 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_assign()
393 xilinx_fb_out32(drvdata, REG_CTRL, 0); in xilinxfb_release()
/linux/drivers/mfd/
H A Dti_am335x_tscadc.c259 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); in ti_tscadc_probe()
264 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); in ti_tscadc_probe()
324 regmap_read(tscadc->regmap, REG_CTRL, &ctrl); in tscadc_suspend()
327 regmap_write(tscadc->regmap, REG_CTRL, ctrl); in tscadc_suspend()
341 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl); in tscadc_resume()
343 regmap_write(tscadc->regmap, REG_CTRL, tscadc->ctrl | CNTRLREG_SSENB); in tscadc_resume()
/linux/drivers/spi/
H A Dspi-meson-spifc.c24 #define REG_CTRL 0x08 macro
254 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, 0); in meson_spifc_transfer_one()
264 regmap_update_bits(spifc->regmap, REG_CTRL, CTRL_ENABLE_AHB, in meson_spifc_transfer_one()
/linux/include/linux/mfd/
H A Dti_am335x_tscadc.h22 #define REG_CTRL 0x040 macro