| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8167.c | 524 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,
526 MUX(CLK_TOP_GFMUX_EMI1X_SEL, "gfmux_emi1x_sel", gfmux_emi1x_parents,
528 MUX(CLK_TOP_EMI_DDRPHY_SEL, "emi_ddrphy_sel", emi_ddrphy_parents,
530 MUX(CLK_TOP_AHB_INFRA_SEL, "ahb_infra_sel", ahb_infra_parents,
532 MUX(CLK_TOP_CSW_MUX_MFG_SEL, "csw_mux_mfg_sel", csw_mux_mfg_parents,
534 MUX(CLK_TOP_MSDC0_SEL, "msdc0_sel", msdc0_parents,
536 MUX(CLK_TOP_CAMTG_MM_SEL, "camtg_mm_sel", camtg_mm_parents,
538 MUX(CLK_TOP_PWM_MM_SEL, "pwm_mm_sel", pwm_mm_parents,
540 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
542 MUX(CLK_TOP_MSDC1_SE
[all...] |
| H A D | clk-mt8516.c | 365 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,
367 MUX(CLK_TOP_AHB_INFRA_SEL, "ahb_infra_sel", ahb_infra_parents,
369 MUX(CLK_TOP_MSDC0_SEL, "msdc0_sel", msdc0_parents,
371 MUX(CLK_TOP_UART1_SEL, "uart1_sel", uart1_parents,
373 MUX(CLK_TOP_MSDC1_SEL, "msdc1_sel", msdc1_parents,
375 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
377 MUX(CLK_TOP_QAXI_AUD26M_SEL, "qaxi_aud26m_sel", qaxi_aud26m_parents,
379 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
382 MUX(CLK_TOP_NFI2X_PAD_SEL, "nfi2x_pad_sel", nfi2x_pad_parents,
384 MUX(CLK_TOP_NFI1X_PAD_SE
[all...] |
| H A D | clk-mt6797.c | 323 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX_PRE, "ulposc_axi_ck_mux_pre",
325 MUX(CLK_TOP_MUX_ULPOSC_AXI_CK_MUX, "ulposc_axi_ck_mux",
327 MUX(CLK_TOP_MUX_AXI, "axi_sel", axi_parents,
331 MUX(CLK_TOP_MUX_MM, "mm_sel", mm_parents,
340 MUX(CLK_TOP_MUX_ULPOSC_SPI_CK_MUX, "ulposc_spi_ck_mux",
344 MUX(CLK_TOP_MUX_MSDC50_0_HCLK, "msdc50_0_hclk_sel",
354 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
356 MUX(CLK_TOP_MUX_PMICSPI, "pmicspi_sel", pmicspi_parents,
358 MUX(CLK_TOP_MUX_SCP, "scp_sel", scp_parents,
360 MUX(CLK_TOP_MUX_AT
[all...] |
| /linux/drivers/clk/samsung/ |
| H A D | clk-exynosautov920.c | 56 /* MUX */
551 MUX(MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
553 MUX(MOUT_SHARED1_PLL, "mout_shared1_pll", mout_shared1_pll_p,
555 MUX(MOUT_SHARED2_PLL, "mout_shared2_pll", mout_shared2_pll_p,
557 MUX(MOUT_SHARED3_PLL, "mout_shared3_pll", mout_shared3_pll_p,
559 MUX(MOUT_SHARED4_PLL, "mout_shared4_pll", mout_shared4_pll_p,
561 MUX(MOUT_SHARED5_PLL, "mout_shared5_pll", mout_shared5_pll_p,
563 MUX(MOUT_MMC_PLL, "mout_mmc_pll", mout_mmc_pll_p,
567 MUX(MOUT_CLKCMU_CMU_BOOST, "mout_clkcmu_cmu_boost",
569 MUX(MOUT_CLKCMU_CMU_CMURE
[all...] |
| H A D | clk-exynos4.c | 426 MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1),
427 MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1),
428 MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1),
433 MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIL1, 8, 2),
434 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
435 MUX(CLK_SCLK_EPLL, "sclk_epll", mout_epll_p, SRC_TOP0, 4, 1),
436 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
438 MUX(0, "mout_dmc_bus", sclk_ampll_p4210, SRC_DMC, 4, 1),
439 MUX(0, "mout_dphy", sclk_ampll_p4210, SRC_DMC, 8, 1),
444 MUX(CLK_MOUT_VPLLSR
[all...] |
| H A D | clk-s5pv210.c | 374 MUX(MOUT_FLASH, "mout_flash", mout_flash_p, CLK_SRC0, 28, 1),
375 MUX(MOUT_PSYS, "mout_psys", mout_group4_p, CLK_SRC0, 24, 1),
376 MUX(MOUT_DSYS, "mout_dsys", mout_group4_p, CLK_SRC0, 20, 1),
377 MUX(MOUT_MSYS, "mout_msys", mout_group3_p, CLK_SRC0, 16, 1),
378 MUX(MOUT_EPLL, "mout_epll", mout_epll_p, CLK_SRC0, 8, 1),
379 MUX(MOUT_MPLL, "mout_mpll", mout_mpll_p, CLK_SRC0, 4, 1),
380 MUX(MOUT_APLL, "mout_apll", mout_apll_p, CLK_SRC0, 0, 1),
382 MUX(MOUT_CLKOUT, "mout_clkout", mout_clkout_p, MISC, 8, 2),
387 MUX(MOUT_VPLL, "mout_vpll", mout_vpll_p, CLK_SRC0, 12, 1),
389 MUX(MOUT_VPLLSR
[all...] |
| H A D | clk-exynos2200.c | 1356 MUX(CLK_MOUT_CMU_CP_MPLL_CLK_D2_USER, "mout_cmu_cp_mpll_clk_d2_user",
1359 MUX(CLK_MOUT_CMU_CP_MPLL_CLK_USER, "mout_cmu_cp_mpll_clk_user",
1362 MUX(CLK_MOUT_CMU_AUD_AUDIF0, "mout_cmu_aud_audif0",
1364 MUX(CLK_MOUT_CMU_AUD_AUDIF1, "mout_cmu_aud_audif1",
1366 MUX(CLK_MOUT_CMU_AUD_CPU, "mout_cmu_aud_cpu", mout_cmu_aud_cpu_p,
1368 MUX(CLK_MOUT_CMU_CPUCL0_DBG_NOC, "mout_cmu_cpucl0_dbg_noc",
1371 MUX(CLK_MOUT_CMU_CPUCL0_SWITCH, "mout_cmu_cpucl0_switch",
1373 MUX(CLK_MOUT_CMU_CPUCL1_SWITCH, "mout_cmu_cpucl1_switch",
1375 MUX(CLK_MOUT_CMU_CPUCL2_SWITCH, "mout_cmu_cpucl2_switch",
1377 MUX(CLK_MOUT_CMU_DNC_NO
[all...] |
| H A D | clk-exynos7.c | 88 MUX(0, "mout_topc_bus0_pll", mout_topc_bus0_pll_ctrl_p,
90 MUX(0, "mout_topc_bus1_pll", mout_topc_bus1_pll_ctrl_p,
92 MUX(0, "mout_topc_cc_pll", mout_topc_cc_pll_ctrl_p,
94 MUX(0, "mout_topc_mfc_pll", mout_topc_mfc_pll_ctrl_p,
96 MUX(0, "mout_topc_bus0_pll_half", mout_topc_bus0_pll_half_p,
98 MUX(0, "mout_topc_bus1_pll_half", mout_topc_bus1_pll_half_p,
100 MUX(0, "mout_topc_cc_pll_half", mout_topc_cc_pll_half_p,
102 MUX(0, "mout_topc_mfc_pll_half", mout_topc_mfc_pll_half_p,
105 MUX(0, "mout_topc_aud_pll", mout_topc_aud_pll_ctrl_p,
107 MUX(
[all...] |
| H A D | clk-exynos990.c | 691 MUX(CLK_MOUT_PLL_SHARED0, "mout_pll_shared0", mout_pll_shared0_p,
693 MUX(CLK_MOUT_PLL_SHARED1, "mout_pll_shared1", mout_pll_shared1_p,
695 MUX(CLK_MOUT_PLL_SHARED2, "mout_pll_shared2", mout_pll_shared2_p,
697 MUX(CLK_MOUT_PLL_SHARED3, "mout_pll_shared3", mout_pll_shared3_p,
699 MUX(CLK_MOUT_PLL_SHARED4, "mout_pll_shared4", mout_pll_shared4_p,
701 MUX(CLK_MOUT_PLL_MMC, "mout_pll_mmc", mout_pll_mmc_p,
703 MUX(CLK_MOUT_PLL_G3D, "mout_pll_g3d", mout_pll_g3d_p,
705 MUX(CLK_MOUT_CMU_APM_BUS, "mout_cmu_apm_bus",
707 MUX(CLK_MOUT_CMU_AUD_CPU, "mout_cmu_aud_cpu",
709 MUX(CLK_MOUT_CMU_BUS0_BU
[all...] |
| H A D | clk-exynos5260.c | 105 MUX(AUD_MOUT_AUD_PLL_USER, "mout_aud_pll_user", mout_aud_pll_user_p,
107 MUX(AUD_MOUT_SCLK_AUD_I2S, "mout_sclk_aud_i2s", mout_sclk_aud_i2s_p,
109 MUX(AUD_MOUT_SCLK_AUD_PCM, "mout_sclk_aud_pcm", mout_sclk_aud_pcm_p,
214 MUX(DISP_MOUT_ACLK_DISP_333_USER, "mout_aclk_disp_333_user",
217 MUX(DISP_MOUT_SCLK_DISP_PIXEL_USER, "mout_sclk_disp_pixel_user",
220 MUX(DISP_MOUT_ACLK_DISP_222_USER, "mout_aclk_disp_222_user",
223 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER,
227 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER,
231 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER,
235 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USE
[all...] |
| H A D | clk-exynos5250.c | 246 MUX(CLK_MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),
262 MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
267 MUX(CLK_MOUT_MPLL, "mout_mpll", mout_mpll_p, SRC_CORE1, 8, 1),
272 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
273 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
274 MUX(0, "mout_aclk300_disp1_mid", mout_aclk200_p, SRC_TOP0, 14, 1),
275 MUX(0, "mout_aclk300", mout_aclk300_p, SRC_TOP0, 15, 1),
276 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
277 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
279 MUX(
[all...] |
| H A D | clk-exynos5410.c | 88 MUX(0, "mout_apll", apll_p, SRC_CPU, 0, 1),
89 MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
91 MUX(0, "mout_kpll", kpll_p, SRC_KFC, 0, 1),
92 MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
94 MUX(0, "sclk_mpll", mpll_p, SRC_CPERI1, 8, 1),
95 MUX(0, "sclk_mpll_muxed", mpll_user_p, SRC_TOP2, 20, 1),
97 MUX(0, "sclk_bpll", bpll_p, SRC_CDREX, 0, 1),
98 MUX(0, "sclk_bpll_muxed", bpll_user_p, SRC_TOP2, 24, 1),
100 MUX(0, "sclk_epll", epll_p, SRC_TOP2, 12, 1),
102 MUX(
[all...] |
| H A D | clk-exynosautov9.c | 50 /* MUX */
443 MUX(MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
445 MUX(MOUT_SHARED1_PLL, "mout_shared1_pll", mout_shared1_pll_p,
447 MUX(MOUT_SHARED2_PLL, "mout_shared2_pll", mout_shared2_pll_p,
449 MUX(MOUT_SHARED3_PLL, "mout_shared3_pll", mout_shared3_pll_p,
451 MUX(MOUT_SHARED4_PLL, "mout_shared4_pll", mout_shared4_pll_p,
455 MUX(MOUT_CLKCMU_CMU_BOOST, "mout_clkcmu_cmu_boost",
457 MUX(MOUT_CLKCMU_CMU_CMUREF, "mout_clkcmu_cmu_cmuref",
461 MUX(MOUT_CLKCMU_ACC_BUS, "mout_clkcmu_acc_bus", mout_clkcmu_acc_bus_p,
465 MUX(MOUT_CLKCMU_APM_BU
[all...] |
| H A D | clk-exynos8895.c | 769 MUX(CLK_MOUT_PLL_SHARED0, "mout_pll_shared0", mout_pll_shared0_p,
771 MUX(CLK_MOUT_PLL_SHARED1, "mout_pll_shared1", mout_pll_shared1_p,
773 MUX(CLK_MOUT_PLL_SHARED2, "mout_pll_shared2", mout_pll_shared2_p,
775 MUX(CLK_MOUT_PLL_SHARED3, "mout_pll_shared3", mout_pll_shared3_p,
777 MUX(CLK_MOUT_PLL_SHARED4, "mout_pll_shared4", mout_pll_shared4_p,
779 MUX(CLK_MOUT_CP2AP_MIF_CLK_USER, "mout_cp2ap_mif_clk_user",
781 MUX(CLK_MOUT_CMU_ABOX_CPUABOX, "mout_cmu_abox_cpuabox",
784 MUX(CLK_MOUT_CMU_APM_BUS, "mout_cmu_apm_bus", mout_cmu_apm_bus_p,
786 MUX(CLK_MOUT_CMU_BUS1_BUS, "mout_cmu_bus1_bus", mout_cmu_bus1_bus_p,
788 MUX(CLK_MOUT_CMU_BUSC_BU
[all...] |
| H A D | clk-exynos3250.c | 250 MUX(CLK_MOUT_MPLL_USER_L, "mout_mpll_user_l", mout_mpll_user_p,
252 MUX(CLK_MOUT_GDL, "mout_gdl", mout_gdl_p, SRC_LEFTBUS, 0, 1),
255 MUX(CLK_MOUT_MPLL_USER_R, "mout_mpll_user_r", mout_mpll_user_p,
257 MUX(CLK_MOUT_GDR, "mout_gdr", mout_gdr_p, SRC_RIGHTBUS, 0, 1),
260 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
261 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p, SRC_TOP0, 24, 1),
262 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
263 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
264 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
265 MUX(CLK_MOUT_ACLK_266_
[all...] |
| H A D | clk-exynos5433.c | 279 MUX(CLK_MOUT_AUD_PLL, "mout_aud_pll", mout_aud_pll_p, MUX_SEL_TOP0,
281 MUX(CLK_MOUT_ISP_PLL, "mout_isp_pll", mout_isp_pll_p, MUX_SEL_TOP0,
285 MUX(CLK_MOUT_AUD_PLL_USER_T, "mout_aud_pll_user_t",
287 MUX(CLK_MOUT_MPHY_PLL_USER, "mout_mphy_pll_user", mout_mphy_pll_user_p,
289 MUX(CLK_MOUT_MFC_PLL_USER, "mout_mfc_pll_user", mout_mfc_pll_user_p,
291 MUX(CLK_MOUT_BUS_PLL_USER, "mout_bus_pll_user", mout_bus_pll_user_p,
295 MUX(CLK_MOUT_ACLK_HEVC_400, "mout_aclk_hevc_400",
297 MUX(CLK_MOUT_ACLK_CAM1_333, "mout_aclk_cam1_333",
299 MUX(CLK_MOUT_ACLK_CAM1_552_B, "mout_aclk_cam1_552_b",
301 MUX(CLK_MOUT_ACLK_CAM1_552_
[all...] |
| H A D | clk-exynos850.c | 313 MUX(CLK_MOUT_SHARED0_PLL, "mout_shared0_pll", mout_shared0_pll_p,
315 MUX(CLK_MOUT_SHARED1_PLL, "mout_shared1_pll", mout_shared1_pll_p,
317 MUX(CLK_MOUT_MMC_PLL, "mout_mmc_pll", mout_mmc_pll_p,
321 MUX(CLK_MOUT_CLKCMU_APM_BUS, "mout_clkcmu_apm_bus",
325 MUX(CLK_MOUT_AUD, "mout_aud", mout_aud_p,
329 MUX(CLK_MOUT_CORE_BUS, "mout_core_bus", mout_core_bus_p,
331 MUX(CLK_MOUT_CORE_CCI, "mout_core_cci", mout_core_cci_p,
333 MUX(CLK_MOUT_CORE_MMC_EMBD, "mout_core_mmc_embd", mout_core_mmc_embd_p,
335 MUX(CLK_MOUT_CORE_SSS, "mout_core_sss", mout_core_sss_p,
339 MUX(CLK_MOUT_CPUCL0_DB
[all...] |
| H A D | clk-s3c64xx.c | 125 MUX(MOUT_APLL, "mout_apll", apll_p, CLK_SRC, 0, 1),
126 MUX(MOUT_MPLL, "mout_mpll", mpll_p, CLK_SRC, 1, 1),
127 MUX(MOUT_EPLL, "mout_epll", epll_p, CLK_SRC, 2, 1),
128 MUX(MOUT_MFC, "mout_mfc", mfc_p, CLK_SRC, 4, 1),
129 MUX(MOUT_AUDIO0, "mout_audio0", audio0_p, CLK_SRC, 7, 3),
130 MUX(MOUT_AUDIO1, "mout_audio1", audio1_p, CLK_SRC, 10, 3),
131 MUX(MOUT_UART, "mout_uart", uart_p, CLK_SRC, 13, 1),
132 MUX(MOUT_SPI0, "mout_spi0", spi_mmc_p, CLK_SRC, 14, 2),
133 MUX(MOUT_SPI1, "mout_spi1", spi_mmc_p, CLK_SRC, 16, 2),
134 MUX(MOUT_MMC
[all...] |
| H A D | clk-exynos7870.c | 365 MUX(CLK_MOUT_MIF_CMU_DISPAUD_BUS, "mout_mif_cmu_dispaud_bus",
367 MUX(CLK_MOUT_MIF_CMU_DISPAUD_DECON_ECLK,
371 MUX(CLK_MOUT_MIF_CMU_DISPAUD_DECON_VCLK,
375 MUX(CLK_MOUT_MIF_CMU_FSYS_BUS, "mout_mif_cmu_fsys_bus",
377 MUX(CLK_MOUT_MIF_CMU_FSYS_MMC0, "mout_mif_cmu_fsys_mmc0",
379 MUX(CLK_MOUT_MIF_CMU_FSYS_MMC1, "mout_mif_cmu_fsys_mmc1",
381 MUX(CLK_MOUT_MIF_CMU_FSYS_MMC2, "mout_mif_cmu_fsys_mmc2",
383 MUX(CLK_MOUT_MIF_CMU_FSYS_USB20DRD_REFCLK,
387 MUX(CLK_MOUT_MIF_CMU_ISP_CAM, "mout_mif_cmu_isp_cam",
389 MUX(CLK_MOUT_MIF_CMU_ISP_IS
[all...] |
| H A D | clk-fsd.c | 198 MUX(0, "mout_cmu_pll_shared0", mout_cmu_shared0_pll_p, PLL_CON0_PLL_SHARED0, 4, 1),
199 MUX(0, "mout_cmu_pll_shared1", mout_cmu_shared1_pll_p, PLL_CON0_PLL_SHARED1, 4, 1),
200 MUX(0, "mout_cmu_pll_shared2", mout_cmu_shared2_pll_p, PLL_CON0_PLL_SHARED2, 4, 1),
201 MUX(0, "mout_cmu_pll_shared3", mout_cmu_shared3_pll_p, PLL_CON0_PLL_SHARED3, 4, 1),
202 MUX(0, "mout_cmu_cis0_clkmux", mout_cmu_cis0_clkmux_p, MUX_CMU_CIS0_CLKMUX, 0, 1),
203 MUX(0, "mout_cmu_cis1_clkmux", mout_cmu_cis1_clkmux_p, MUX_CMU_CIS1_CLKMUX, 0, 1),
204 MUX(0, "mout_cmu_cis2_clkmux", mout_cmu_cis2_clkmux_p, MUX_CMU_CIS2_CLKMUX, 0, 1),
205 MUX(0, "mout_cmu_cpucl_switchmux", mout_cmu_cpucl_switchmux_p,
207 MUX(0, "mout_cmu_fsys1_aclk_mux", mout_cmu_fsys1_aclk_mux_p, MUX_CMU_FSYS1_ACLK_MUX, 0, 1),
208 MUX(
[all...] |
| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra-periph.c | 132 #define MUX(_name, _parents, _offset, \ macro
639 MUX("i2s0", mux_pllaout0_audio0_2x_pllp_clkm, CLK_SOURCE_I2S0, 30, TEGRA_PERIPH_ON_APB, tegra_clk_i2s0),
640 MUX("i2s1", mux_pllaout0_audio1_2x_pllp_clkm, CLK_SOURCE_I2S1, 11, TEGRA_PERIPH_ON_APB, tegra_clk_i2s1),
641 MUX("i2s2", mux_pllaout0_audio2_2x_pllp_clkm, CLK_SOURCE_I2S2, 18, TEGRA_PERIPH_ON_APB, tegra_clk_i2s2),
642 MUX("i2s3", mux_pllaout0_audio3_2x_pllp_clkm, CLK_SOURCE_I2S3, 101, TEGRA_PERIPH_ON_APB, tegra_clk_i2s3),
643 MUX("i2s4", mux_pllaout0_audio4_2x_pllp_clkm, CLK_SOURCE_I2S4, 102, TEGRA_PERIPH_ON_APB, tegra_clk_i2s4),
644 MUX("spdif_out", mux_pllaout0_audio_2x_pllp_clkm, CLK_SOURCE_SPDIF_OUT, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_out),
645 MUX("spdif_in", mux_pllp_pllc_pllm, CLK_SOURCE_SPDIF_IN, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_in),
647 MUX("pwm", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_PWM, 17, TEGRA_PERIPH_ON_APB, tegra_clk_pwm),
648 MUX("ad
[all...] |
| /linux/drivers/clk/pistachio/ |
| H A D | clk-pistachio.c | 124 MUX(CLK_AUDIO_REF_MUX, "audio_refclk_mux", mux_xtal_audio_refclk,
126 MUX(CLK_MIPS_PLL_MUX, "mips_pll_mux", mux_xtal_mips, 0x200, 1),
127 MUX(CLK_AUDIO_PLL_MUX, "audio_pll_mux", mux_xtal_audio, 0x200, 2),
128 MUX(CLK_AUDIO_MUX, "audio_mux", mux_audio_debug, 0x200, 4),
129 MUX(CLK_RPU_V_PLL_MUX, "rpu_v_pll_mux", mux_xtal_rpu_v, 0x200, 5),
130 MUX(CLK_RPU_L_PLL_MUX, "rpu_l_pll_mux", mux_xtal_rpu_l, 0x200, 6),
131 MUX(CLK_RPU_L_MUX, "rpu_l_mux", mux_rpu_l_mips, 0x200, 7),
132 MUX(CLK_WIFI_PLL_MUX, "wifi_pll_mux", mux_xtal_wifi, 0x200, 8),
133 MUX(CLK_WIFI_DIV4_MUX, "wifi_div4_mux", mux_xtal_wifi_div4, 0x200, 9),
134 MUX(CLK_WIFI_DIV8_MU
[all...] |
| /linux/Documentation/i2c/ |
| H A D | i2c-sysfs.rst | 10 I2C topology can be complex because of the existence of I2C MUX
12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
32 2. General knowledge of I2C, I2C MUX and I2C topology.
85 an abstraction of a channel behind an I2C MUX. In case it is an abstraction of a
86 MUX channel, whenever we access an I2C device via a such logical bus, the kernel
87 will switch the I2C MUX for you to the proper channel as part of the
109 MUX fanouts. For the following examples, we will assume that the physical I2C
123 `-- 7-0071 (4-channel I2C MUX at 0x71)
127 | |-- 73-0070 (I2C MUX a
[all...] |
| /linux/drivers/clk/rockchip/ |
| H A D | clk-rk3568.c | 355 MUX(CLK_I2S0_8CH_TX, "clk_i2s0_8ch_tx", clk_i2s0_8ch_tx_p, CLK_SET_RATE_PARENT,
359 MUX(CLK_I2S0_8CH_RX, "clk_i2s0_8ch_rx", clk_i2s0_8ch_rx_p, CLK_SET_RATE_PARENT,
363 MUX(CLK_I2S1_8CH_TX, "clk_i2s1_8ch_tx", clk_i2s1_8ch_tx_p, CLK_SET_RATE_PARENT,
367 MUX(CLK_I2S1_8CH_RX, "clk_i2s1_8ch_rx", clk_i2s1_8ch_rx_p, CLK_SET_RATE_PARENT,
371 MUX(CLK_I2S2_2CH, "clk_i2s2_2ch", clk_i2s2_2ch_p, CLK_SET_RATE_PARENT,
375 MUX(CLK_I2S3_2CH_TX, "clk_i2s3_2ch_tx", clk_i2s3_2ch_tx_p, CLK_SET_RATE_PARENT,
379 MUX(CLK_I2S3_2CH_RX, "clk_i2s3_2ch_rx", clk_i2s3_2ch_rx_p, CLK_SET_RATE_PARENT,
383 MUX(MCLK_SPDIF_8CH, "mclk_spdif_8ch", mclk_spdif_8ch_p, CLK_SET_RATE_PARENT,
387 MUX(SCLK_AUDPWM, "sclk_audpwm", sclk_audpwm_p, CLK_SET_RATE_PARENT,
391 MUX(
[all...] |
| H A D | clk-rk3308.c | 199 MUX(0, "clk_uart0_mux", mux_uart0_p, CLK_SET_RATE_PARENT,
203 MUX(0, "clk_uart1_mux", mux_uart1_p, CLK_SET_RATE_PARENT,
207 MUX(0, "clk_uart2_mux", mux_uart2_p, CLK_SET_RATE_PARENT,
211 MUX(0, "clk_uart3_mux", mux_uart3_p, CLK_SET_RATE_PARENT,
215 MUX(0, "clk_uart4_mux", mux_uart4_p, CLK_SET_RATE_PARENT,
219 MUX(0, "dclk_vop_mux", mux_dclk_vop_p, CLK_SET_RATE_PARENT,
223 MUX(SCLK_RTC32K, "clk_rtc32k", mux_rtc32k_p, CLK_SET_RATE_PARENT,
227 MUX(0, "clk_pdm_mux", mux_pdm_p, CLK_SET_RATE_PARENT,
231 MUX(SCLK_I2S0_8CH_TX_MUX, "clk_i2s0_8ch_tx_mux", mux_i2s0_8ch_tx_p, CLK_SET_RATE_PARENT,
235 MUX(SCLK_I2S0_8CH_RX_MU
[all...] |