Searched refs:ESR_ELx_EC_MASK (Results 1 – 5 of 5) sorted by relevance
72 #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) macro 73 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)183 #define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \
75 #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT) macro 76 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT)202 #define ESR_ELx_WFx_MASK (ESR_ELx_EC_MASK | \
84 u64 esr = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SVE) | in kvm_inject_nested_sve_trap()
436 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL | in set_thread_esr() 446 esr &= ESR_ELx_EC_MASK | ESR_ELx_IL; in set_thread_esr()
505 vcpu->arch.fault.esr_el2 = FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_SYS64) | in kvm_hyp_handle_impdef()