1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022. Qualcomm Innovation Center, Inc. All rights reserved. 5 * Copyright (c) 2023, Richard Acayan. All rights reserved. 6 */ 7 8 #ifndef _DPU_4_1_SDM670_H 9 #define _DPU_4_1_SDM670_H 10 11 static const struct dpu_mdp_cfg sdm670_mdp = { 12 .name = "top_0", 13 .base = 0x0, .len = 0x45c, 14 .clk_ctrls = { 15 [DPU_CLK_CTRL_VIG0] = { .reg_off = 0x2ac, .bit_off = 0 }, 16 [DPU_CLK_CTRL_VIG1] = { .reg_off = 0x2b4, .bit_off = 0 }, 17 [DPU_CLK_CTRL_DMA0] = { .reg_off = 0x2ac, .bit_off = 8 }, 18 [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 }, 19 [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 }, 20 }, 21 }; 22 23 static const struct dpu_sspp_cfg sdm670_sspp[] = { 24 { 25 .name = "sspp_0", .id = SSPP_VIG0, 26 .base = 0x4000, .len = 0x1c8, 27 .features = VIG_SDM845_MASK_SDMA, 28 .sblk = &dpu_vig_sblk_qseed3_1_3, 29 .xin_id = 0, 30 .type = SSPP_TYPE_VIG, 31 .clk_ctrl = DPU_CLK_CTRL_VIG0, 32 }, { 33 .name = "sspp_1", .id = SSPP_VIG1, 34 .base = 0x6000, .len = 0x1c8, 35 .features = VIG_SDM845_MASK_SDMA, 36 .sblk = &dpu_vig_sblk_qseed3_1_3, 37 .xin_id = 4, 38 .type = SSPP_TYPE_VIG, 39 .clk_ctrl = DPU_CLK_CTRL_VIG0, 40 }, { 41 .name = "sspp_8", .id = SSPP_DMA0, 42 .base = 0x24000, .len = 0x1c8, 43 .features = DMA_SDM845_MASK_SDMA, 44 .sblk = &dpu_dma_sblk, 45 .xin_id = 1, 46 .type = SSPP_TYPE_DMA, 47 .clk_ctrl = DPU_CLK_CTRL_DMA0, 48 }, { 49 .name = "sspp_9", .id = SSPP_DMA1, 50 .base = 0x26000, .len = 0x1c8, 51 .features = DMA_CURSOR_SDM845_MASK_SDMA, 52 .sblk = &dpu_dma_sblk, 53 .xin_id = 5, 54 .type = SSPP_TYPE_DMA, 55 .clk_ctrl = DPU_CLK_CTRL_DMA1, 56 }, { 57 .name = "sspp_10", .id = SSPP_DMA2, 58 .base = 0x28000, .len = 0x1c8, 59 .features = DMA_CURSOR_SDM845_MASK_SDMA, 60 .sblk = &dpu_dma_sblk, 61 .xin_id = 9, 62 .type = SSPP_TYPE_DMA, 63 .clk_ctrl = DPU_CLK_CTRL_DMA2, 64 }, 65 }; 66 67 static const struct dpu_lm_cfg sdm670_lm[] = { 68 { 69 .name = "lm_0", .id = LM_0, 70 .base = 0x44000, .len = 0x320, 71 .features = MIXER_MSM8998_MASK, 72 .sblk = &sdm845_lm_sblk, 73 .lm_pair = LM_1, 74 .pingpong = PINGPONG_0, 75 .dspp = DSPP_0, 76 }, { 77 .name = "lm_1", .id = LM_1, 78 .base = 0x45000, .len = 0x320, 79 .features = MIXER_MSM8998_MASK, 80 .sblk = &sdm845_lm_sblk, 81 .lm_pair = LM_0, 82 .pingpong = PINGPONG_1, 83 .dspp = DSPP_1, 84 }, { 85 .name = "lm_2", .id = LM_2, 86 .base = 0x46000, .len = 0x320, 87 .features = MIXER_MSM8998_MASK, 88 .sblk = &sdm845_lm_sblk, 89 .lm_pair = LM_5, 90 .pingpong = PINGPONG_2, 91 }, { 92 .name = "lm_5", .id = LM_5, 93 .base = 0x49000, .len = 0x320, 94 .features = MIXER_MSM8998_MASK, 95 .sblk = &sdm845_lm_sblk, 96 .lm_pair = LM_2, 97 .pingpong = PINGPONG_3, 98 }, 99 }; 100 101 static const struct dpu_dspp_cfg sdm670_dspp[] = { 102 { 103 .name = "dspp_0", .id = DSPP_0, 104 .base = 0x54000, .len = 0x1800, 105 .sblk = &sdm845_dspp_sblk, 106 }, { 107 .name = "dspp_1", .id = DSPP_1, 108 .base = 0x56000, .len = 0x1800, 109 .sblk = &sdm845_dspp_sblk, 110 }, 111 }; 112 113 static const struct dpu_dsc_cfg sdm670_dsc[] = { 114 { 115 .name = "dsc_0", .id = DSC_0, 116 .base = 0x80000, .len = 0x140, 117 }, { 118 .name = "dsc_1", .id = DSC_1, 119 .base = 0x80400, .len = 0x140, 120 }, 121 }; 122 123 static const struct dpu_mdss_version sdm670_mdss_ver = { 124 .core_major_ver = 4, 125 .core_minor_ver = 1, 126 }; 127 128 const struct dpu_mdss_cfg dpu_sdm670_cfg = { 129 .mdss_ver = &sdm670_mdss_ver, 130 .caps = &sdm845_dpu_caps, 131 .mdp = &sdm670_mdp, 132 .cdm = &dpu_cdm_1_x_4_x, 133 .ctl_count = ARRAY_SIZE(sdm845_ctl), 134 .ctl = sdm845_ctl, 135 .sspp_count = ARRAY_SIZE(sdm670_sspp), 136 .sspp = sdm670_sspp, 137 .mixer_count = ARRAY_SIZE(sdm670_lm), 138 .mixer = sdm670_lm, 139 .dspp_count = ARRAY_SIZE(sdm670_dspp), 140 .dspp = sdm670_dspp, 141 .pingpong_count = ARRAY_SIZE(sdm845_pp), 142 .pingpong = sdm845_pp, 143 .dsc_count = ARRAY_SIZE(sdm670_dsc), 144 .dsc = sdm670_dsc, 145 .intf_count = ARRAY_SIZE(sdm845_intf), 146 .intf = sdm845_intf, 147 .vbif_count = ARRAY_SIZE(sdm845_vbif), 148 .vbif = sdm845_vbif, 149 .perf = &sdm845_perf_data, 150 }; 151 152 #endif 153