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Searched refs:rmmio_remap (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_0.c38 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v7_0_remap_hdp_registers()
40 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v7_0_remap_hdp_registers()
293 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v7_0_set_reg_remap()
294 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v7_0_set_reg_remap()
296 adev->rmmio_remap.reg_offset = in nbio_v7_0_set_reg_remap()
298 adev->rmmio_remap.bus_addr = 0; in nbio_v7_0_set_reg_remap()
H A Dnbio_v7_11.c33 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v7_11_remap_hdp_registers()
35 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v7_11_remap_hdp_registers()
368 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v7_11_set_reg_remap()
369 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v7_11_set_reg_remap()
371 adev->rmmio_remap.reg_offset = in nbio_v7_11_set_reg_remap()
373 adev->rmmio_remap.bus_addr = 0; in nbio_v7_11_set_reg_remap()
H A Dnbio_v7_2.c52 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v7_2_remap_hdp_registers()
54 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v7_2_remap_hdp_registers()
411 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v7_2_set_reg_remap()
412 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v7_2_set_reg_remap()
414 adev->rmmio_remap.reg_offset = in nbio_v7_2_set_reg_remap()
417 adev->rmmio_remap.bus_addr = 0; in nbio_v7_2_set_reg_remap()
H A Dnbio_v6_1.c58 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v6_1_remap_hdp_registers()
60 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v6_1_remap_hdp_registers()
397 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v6_1_set_reg_remap()
398 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v6_1_set_reg_remap()
400 adev->rmmio_remap.reg_offset = in nbio_v6_1_set_reg_remap()
403 adev->rmmio_remap.bus_addr = 0; in nbio_v6_1_set_reg_remap()
H A Damdgpu_hdp.c55 WREG32((adev->rmmio_remap.reg_offset + in amdgpu_hdp_generic_flush()
63 (adev->rmmio_remap.reg_offset + in amdgpu_hdp_generic_flush()
H A Dhdp_v5_2.c34 WREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, in hdp_v5_2_flush_hdp()
38 RREG32_NO_KIQ((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2); in hdp_v5_2_flush_hdp()
49 (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, in hdp_v5_2_flush_hdp()
H A Dnbif_v6_3_1.c36 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbif_v6_3_1_remap_hdp_registers()
38 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbif_v6_3_1_remap_hdp_registers()
441 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbif_v6_3_1_set_reg_remap()
442 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbif_v6_3_1_set_reg_remap()
444 adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, in nbif_v6_3_1_set_reg_remap()
446 adev->rmmio_remap.bus_addr = 0; in nbif_v6_3_1_set_reg_remap()
H A Dnbio_v2_3.c69 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v2_3_remap_hdp_registers()
71 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v2_3_remap_hdp_registers()
556 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v2_3_set_reg_remap()
557 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v2_3_set_reg_remap()
559 adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, in nbio_v2_3_set_reg_remap()
561 adev->rmmio_remap.bus_addr = 0; in nbio_v2_3_set_reg_remap()
H A Dnbio_v4_3.c34 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL); in nbio_v4_3_remap_hdp_registers()
36 adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL); in nbio_v4_3_remap_hdp_registers()
479 adev->rmmio_remap.reg_offset = MMIO_REG_HOLE_OFFSET; in nbio_v4_3_set_reg_remap()
480 adev->rmmio_remap.bus_addr = adev->rmmio_base + MMIO_REG_HOLE_OFFSET; in nbio_v4_3_set_reg_remap()
482 adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0, in nbio_v4_3_set_reg_remap()
484 adev->rmmio_remap.bus_addr = 0; in nbio_v4_3_set_reg_remap()
H A Damdgpu.h985 struct amdgpu_mmio_remap rmmio_remap; member