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Searched refs:prescaler (Results 1 – 25 of 35) sorted by relevance

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/linux/drivers/pwm/
H A Dpwm-sun4i.c114 unsigned int prescaler; in sun4i_pwm_get_state() local
138 prescaler = 1; in sun4i_pwm_get_state()
140 prescaler = prescaler_table[PWM_REG_PRESCAL(val, pwm->hwpwm)]; in sun4i_pwm_get_state()
142 if (prescaler == 0) in sun4i_pwm_get_state()
158 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_DTY(val); in sun4i_pwm_get_state()
161 tmp = (u64)prescaler * NSEC_PER_SEC * PWM_REG_PRD(val); in sun4i_pwm_get_state()
173 unsigned int prescaler = 0; in sun4i_pwm_calculate() local
188 /* First, test without any prescaler when available */ in sun4i_pwm_calculate()
189 prescaler = PWM_PRESCAL_MASK; in sun4i_pwm_calculate()
191 * When not using any prescaler, th in sun4i_pwm_calculate()
237 unsigned int delay_us, prescaler = 0; sun4i_pwm_apply() local
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H A Dpwm-renesas-tpu.c75 unsigned int prescaler; member
172 * - Set prescaler in tpu_pwm_timer_start()
178 tpd->prescaler); in tpu_pwm_timer_start()
225 tpd->prescaler = 0; in tpu_pwm_request()
247 unsigned int prescaler; in tpu_pwm_config() local
268 * Find the minimal prescaler in [0..3] such that in tpu_pwm_config()
270 * period >> (2 * prescaler) < 0x10000 in tpu_pwm_config()
274 * prescaler = max(ilog2(period) / 2, 7) - 7; in tpu_pwm_config()
281 prescaler = 0; in tpu_pwm_config()
285 prescaler in tpu_pwm_config()
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H A Dpwm-rockchip.c50 unsigned int prescaler; member
66 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_get_state()
109 u64 prescaled_ns = (u64)pc->data->prescaler * NSEC_PER_SEC; in rockchip_pwm_config()
119 * default prescaler value for all practical clock rate values. in rockchip_pwm_config()
246 .prescaler = 2,
259 .prescaler = 1,
273 .prescaler = 1,
287 .prescaler = 1,
/linux/drivers/tty/serial/8250/
H A D8250_ni.c72 u8 prescaler; member
160 u8 prescaler) in ni16550_config_prescaler() argument
180 /* Set prescaler to CPR register. */ in ni16550_config_prescaler()
182 serial_out(up, UART_ICR, prescaler); in ni16550_config_prescaler()
283 unsigned int prescaler; in ni16550_probe() local
347 prescaler = info->prescaler; in ni16550_probe()
348 device_property_read_u32(dev, "clock-prescaler", &prescaler); in ni16550_probe()
349 if (prescaler) { in ni16550_probe()
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/linux/drivers/watchdog/
H A Dmpc8xxx_wdt.c44 int prescaler; member
186 ddata->swtc = min(ddata->wdd.timeout * freq / wdt_type->prescaler, in mpc8xxx_wdt_probe()
197 ddata->wdd.max_hw_heartbeat_ms = (ddata->swtc * wdt_type->prescaler) / in mpc8xxx_wdt_probe()
219 .prescaler = 0x10000,
226 .prescaler = 0x10000,
234 .prescaler = 0x800,
H A Dcadence_wdt.c34 /* Clock prescaler value and selection */
67 * @prescaler: for saving prescaler value
68 * @ctrl_clksel: counter clock prescaler selection
78 u32 prescaler; member
163 * calculated count = (timeout * clock) / prescaler + 1.
166 * Clears the contents of prescaler and counter reset value. Sets the
167 * prescaler to 4096 and the calculated count and access key
186 count = (wdd->timeout * (clock_f / wdt->prescaler)) / in cdns_wdt_start()
338 wdt->prescaler in cdns_wdt_probe()
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H A Dkempld_wdt.c133 u32 prescaler; in kempld_wdt_set_stage_timeout() local
139 prescaler = kempld_prescaler[PRESCALER_21]; in kempld_wdt_set_stage_timeout()
145 remainder = do_div(stage_timeout64, prescaler); in kempld_wdt_set_stage_timeout()
175 u32 prescaler; in kempld_wdt_get_timeout() local
184 prescaler = kempld_prescaler[STAGE_CFG_GET_PRESCALER(stage_cfg)]; in kempld_wdt_get_timeout()
186 stage_timeout = (stage_timeout & stage->mask) * prescaler; in kempld_wdt_get_timeout()
/linux/Documentation/misc-devices/
H A Doxsemi-tornado.rst11 frequency by dividing it by the clock prescaler, which can be set to any
19 By default the oversampling rate is set to 16 and the clock prescaler is
27 prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_
29 the prescaler the enhanced mode has to be explicitly enabled though, by
31 the prescaler or otherwise it is bypassed as if the value of 1 was used.
34 devices that do not have the extra prescaler's 9th bit in CPR2, so the
45 (tcr), the clock prescaler (cpr) and the divisor (div) produced by the
93 used by encoding the values for, the prescaler, the oversampling rate
109 oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are
113 respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler valu
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/linux/drivers/rtc/
H A Drtc-mpfs.c219 unsigned long prescaler; in mpfs_rtc_probe() local
259 /* prescaler hardware adds 1 to reg value */ in mpfs_rtc_probe()
260 prescaler = clk_get_rate(devm_clk_get(&pdev->dev, "rtcref")) - 1; in mpfs_rtc_probe()
261 if (prescaler > MAX_PRESCALER_COUNT) { in mpfs_rtc_probe()
262 dev_dbg(&pdev->dev, "invalid prescaler %lu\n", prescaler); in mpfs_rtc_probe()
266 writel(prescaler, rtcdev->base + PRESCALER_REG); in mpfs_rtc_probe()
267 dev_info(&pdev->dev, "prescaler set to: %lu\n", prescaler); in mpfs_rtc_probe()
/linux/drivers/i2c/busses/
H A Di2c-mpc.c390 * According to the AN2919 all MPC824x have prescaler 1, while MPC83xx in mpc_i2c_get_prescaler_8xxx()
391 * may have prescaler 1, 2, or 3, depending on the power-on in mpc_i2c_get_prescaler_8xxx()
394 u32 prescaler = 1; in mpc_i2c_get_prescaler_8xxx() local
408 /* the above 85xx SoCs have prescaler 1 */ in mpc_i2c_get_prescaler_8xxx()
409 prescaler = 1; in mpc_i2c_get_prescaler_8xxx()
412 /* the above 85xx SoCs have prescaler 3 or 2 */ in mpc_i2c_get_prescaler_8xxx()
413 prescaler = mpc_i2c_get_sec_cfg_8xxx() ? 3 : 2; in mpc_i2c_get_prescaler_8xxx()
415 /* all the other 85xx have prescaler 2 */ in mpc_i2c_get_prescaler_8xxx()
416 prescaler = 2; in mpc_i2c_get_prescaler_8xxx()
419 return prescaler; in mpc_i2c_get_prescaler_8xxx()
426 u32 prescaler = mpc_i2c_get_prescaler_8xxx(); mpc_i2c_get_fdr_8xxx() local
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/linux/drivers/thermal/st/
H A Dstm_thermal.c200 u32 prescaler; in stm_thermal_calibration() local
202 /* Figure out prescaler value for PCLK during calibration */ in stm_thermal_calibration()
207 prescaler = 0; in stm_thermal_calibration()
210 while (prescaler <= clk_freq) in stm_thermal_calibration()
211 prescaler++; in stm_thermal_calibration()
216 /* Clear prescaler */ in stm_thermal_calibration()
219 /* Set prescaler. pclk_freq/prescaler < 1MHz */ in stm_thermal_calibration()
220 value |= (prescaler << HSREF_CLK_DIV_POS); in stm_thermal_calibration()
/linux/arch/arm/mach-omap2/
H A Dvc.c467 * Calculates voltage ramp prescaler + counter values for a voltage
470 * bits[8:9] prescaler ... bits[0:5] counter. See OMAP4 TRM for reference.
474 u32 prescaler; in omap4_calc_volt_ramp() local
483 prescaler = 0; in omap4_calc_volt_ramp()
485 /* shift to next prescaler until no overflow */ in omap4_calc_volt_ramp()
490 prescaler++; in omap4_calc_volt_ramp()
496 prescaler++; in omap4_calc_volt_ramp()
502 prescaler++; in omap4_calc_volt_ramp()
514 return (prescaler << OMAP4430_RAMP_UP_PRESCAL_SHIFT) | in omap4_calc_volt_ramp()
/linux/drivers/iio/frequency/
H A Dadf4350.c145 u32 div_gcd, prescaler, chspc; in adf4350_set_freq() local
153 prescaler = ADF4350_REG1_PRESCALER; in adf4350_set_freq()
156 prescaler = 0; in adf4350_set_freq()
210 1 << st->r4_rf_div_sel, prescaler ? "8/9" : "4/5", in adf4350_set_freq()
218 prescaler; in adf4350_set_freq()
/linux/drivers/counter/
H A Dstm32-timer-cnt.c245 struct counter_count *count, u64 *prescaler) in stm32_count_prescaler_read() argument
252 *prescaler = psc + 1; in stm32_count_prescaler_read()
258 struct counter_count *count, u64 prescaler) in stm32_count_prescaler_write() argument
263 if (!prescaler || prescaler > MAX_TIM_PSC + 1) in stm32_count_prescaler_write()
266 psc = prescaler - 1; in stm32_count_prescaler_write()
338 COUNTER_COMP_COUNT_U64("prescaler", stm32_count_prescaler_read,
H A D104-quad-8.c55 * @fck_prescaler: array of filter clock prescaler configurations
1003 u8 *prescaler) in quad8_signal_fck_prescaler_read() argument
1007 *prescaler = priv->fck_prescaler[signal->id / 2]; in quad8_signal_fck_prescaler_read()
1013 const u8 prescaler) in quad8_filter_clock_prescaler_set() argument
1020 ret = regmap_write(priv->map, QUAD8_DATA(id), prescaler); in quad8_filter_clock_prescaler_set()
1028 u8 prescaler) in quad8_signal_fck_prescaler_write() argument
1037 priv->fck_prescaler[channel_id] = prescaler; in quad8_signal_fck_prescaler_write()
1038 ret = quad8_filter_clock_prescaler_set(priv, channel_id, prescaler); in quad8_signal_fck_prescaler_write()
/linux/drivers/iio/trigger/
H A Dstm32-timer-trigger.c126 int prescaler = 0, ret; in stm32_timer_start() local
129 /* Period and prescaler values depends of clock rate */ in stm32_timer_start()
137 * Increase prescaler value until we get a result that fit in stm32_timer_start()
141 prescaler++; in stm32_timer_start()
143 do_div(div, (prescaler + 1)); in stm32_timer_start()
147 if (prescaler > MAX_TIM_PSC) { in stm32_timer_start()
148 dev_err(priv->dev, "prescaler exceeds the maximum value\n"); in stm32_timer_start()
165 regmap_write(priv->regmap, TIM_PSC, prescaler); in stm32_timer_start()
/linux/drivers/usb/serial/
H A Dkeyspan_usa26msg.h155 prescaler; // BOTH: specified as N/8; values 8-ff are valid member
158 // note: in USA17, prescaler is applied whenever
H A Dkeyspan_usa49msg.h143 prescaler, // specified as N/8; values 8-ff are valid member
H A Dkeyspan_usa67msg.h153 prescaler; // specified as N/8; values 8-ff are valid member
/linux/include/linux/platform_data/
H A Ddmtimer-omap.h39 int (*set_prescaler)(struct omap_dm_timer *timer, int prescaler);
/linux/drivers/tty/serial/
H A Dmpc52xx_uart.c123 /* setting the prescaler and divisor reg is common for all chips */
125 u16 prescaler, unsigned int divisor) in mpc52xx_set_divisor() argument
127 /* select prescaler */ in mpc52xx_set_divisor()
128 out_be16(&psc->mpc52xx_psc_clock_select, prescaler); in mpc52xx_set_divisor()
295 /* The 5200 has a fixed /32 prescaler, uartclk contains the ipb freq */ in mpc5200_psc_set_baudrate()
301 /* enable the /32 prescaler and set the divisor */ in mpc5200_psc_set_baudrate()
312 u16 prescaler; in mpc5200b_psc_set_baudrate() local
314 /* The 5200B has a selectable /4 or /32 prescaler, uartclk contains the in mpc5200b_psc_set_baudrate()
321 /* select the proper prescaler and set the divisor in mpc5200b_psc_set_baudrate()
322 * prefer high prescaler fo in mpc5200b_psc_set_baudrate()
873 mpc5125_set_divisor(struct mpc5125_psc __iomem * psc,u8 prescaler,unsigned int divisor) mpc5125_set_divisor() argument
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/linux/drivers/hwmon/
H A Dmax6650.c38 /* prescaler: Possible values are 1, 2, 4, 8, 16 or 0 for don't change */
39 static int prescaler; variable
44 module_param(prescaler, int, 0444);
233 * 2) The prescaler (low three bits of the config register) has already
234 * been set to an appropriate value. Use the prescaler module parameter
252 * KSCALE is the prescaler value (1, 2, 4, 8, or 16)
375 prescale = prescaler; in max6650_init_client()
419 dev_err(dev, "illegal value for prescaler (%d)\n", prescale); in max6650_init_client()
422 dev_info(dev, "Fan voltage: %dV, prescaler: %d.\n", in max6650_init_client()
/linux/drivers/atm/
H A Deni.h43 int prescaler; /* shaping prescaler */ member
/linux/drivers/clocksource/
H A Dtimer-ti-dm.c897 int prescaler) in omap_dm_timer_set_prescaler() argument
905 if (unlikely(!timer) || prescaler < -1 || prescaler > 7) in omap_dm_timer_set_prescaler()
915 if (prescaler >= 0) { in omap_dm_timer_set_prescaler()
917 l |= prescaler << 2; in omap_dm_timer_set_prescaler()
/linux/drivers/media/rc/
H A Dmceusb.c706 // prescaler should make sense in mceusb_dev_printdata()
1034 int prescaler = 0, divisor = 0; in mceusb_set_tx_carrier() local
1050 for (prescaler = 0; prescaler < 4; ++prescaler) { in mceusb_set_tx_carrier()
1051 divisor = (clk >> (2 * prescaler)) / carrier; in mceusb_set_tx_carrier()
1054 cmdbuf[2] = prescaler; in mceusb_set_tx_carrier()

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