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Searched refs:op1 (Results 1 – 25 of 47) sorted by relevance

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/linux/drivers/gpu/drm/xe/instructions/
H A Dxe_alu_commands.h58 #define CS_ALU_INSTR(opcode, op1, op2) (REG_FIELD_PREP(GENMASK(31, 20), (opcode)) | \ argument
59 REG_FIELD_PREP(GENMASK(19, 10), (op1)) | \
62 #define __CS_ALU_INSTR(opcode, op1, op2) CS_ALU_INSTR(CS_ALU_OPCODE_##opcode, \ argument
63 CS_ALU_OPERAND_##op1, \
67 #define CS_ALU_INSTR_LOAD(op1, op2) __CS_ALU_INSTR(LOAD, op1, op2) argument
68 #define CS_ALU_INSTR_LOADINV(op1, op2) __CS_ALU_INSTR(LOADINV, op1, op2) argument
69 #define CS_ALU_INSTR_LOAD0(op1) __CS_ALU_INSTR(LOAD0, op1, N argument
70 CS_ALU_INSTR_LOAD1(op1) global() argument
76 CS_ALU_INSTR_STORE(op1,op2) global() argument
77 CS_ALU_INSTR_STOREINV(op1,op2) global() argument
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/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c13 u16 qm_mulu16(u16 op1, u16 op2) in qm_mulu16() argument
15 return (u16) (((u32) op1 * (u32) op2) >> 16); in qm_mulu16()
26 s16 qm_muls16(s16 op1, s16 op2) in qm_muls16() argument
29 if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000) in qm_muls16()
32 result = ((s32) (op1) * (s32) (op2)); in qm_muls16()
42 s32 qm_add32(s32 op1, s32 op2) in qm_add32() argument
45 result = op1 + op2; in qm_add32()
46 if (op1 < 0 && op2 < 0 && result > 0) in qm_add32()
48 else if (op1 > 0 && op2 > 0 && result < 0) in qm_add32()
59 s16 qm_add16(s16 op1, s1 argument
78 qm_sub16(s16 op1,s16 op2) qm_sub16() argument
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H A Dphy_qmath.h11 u16 qm_mulu16(u16 op1, u16 op2);
13 s16 qm_muls16(s16 op1, s16 op2);
15 s32 qm_add32(s32 op1, s32 op2);
17 s16 qm_add16(s16 op1, s16 op2);
19 s16 qm_sub16(s16 op1, s16 op2);
/linux/arch/arc/include/asm/
H A Datomic64-arcv2.h49 #define ATOMIC64_OP(op, op1, op2) \ argument
57 " " #op1 " %L0, %L0, %L2 \n" \
66 #define ATOMIC64_OP_RETURN(op, op1, op2) \ argument
74 " " #op1 " %L0, %L0, %L2 \n" \
88 #define ATOMIC64_FETCH_OP(op, op1, op2) \ argument
96 " " #op1 " %L1, %L0, %L3 \n" \
115 #define ATOMIC64_OPS(op, op1, op2) \ argument
116 ATOMIC64_OP(op, op1, op2) \
117 ATOMIC64_OP_RETURN(op, op1, op2) \
118 ATOMIC64_FETCH_OP(op, op1, op
124 ATOMIC64_OPS(op,op1,op2) global() argument
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gpu_commands.h345 #define MI_MATH_INSTR(opcode, op1, op2) ((opcode) << 20 | (op1) << 10 | (op2)) argument
348 #define MI_MATH_LOAD(op1, op2) MI_MATH_INSTR(0x080, op1, op2) argument
349 #define MI_MATH_LOADINV(op1, op2) MI_MATH_INSTR(0x480, op1, op2) argument
350 #define MI_MATH_LOAD0(op1) MI_MATH_INSTR(0x081, op1) argument
351 #define MI_MATH_LOAD1(op1) MI_MATH_INSTR(0x481, op1) argument
357 MI_MATH_STORE(op1,op2) global() argument
358 MI_MATH_STOREINV(op1,op2) global() argument
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/linux/include/trace/events/
H A Dhost1x.h50 TP_PROTO(const char *name, u32 op1, u32 op2),
52 TP_ARGS(name, op1, op2),
56 __field(u32, op1)
62 __entry->op1 = op1;
66 TP_printk("name=%s, op1=%08x, op2=%08x",
67 __entry->name, __entry->op1, __entry->op2)
71 TP_PROTO(const char *name, u32 op1, u32 op2, u32 op3, u32 op4),
73 TP_ARGS(name, op1, op2, op3, op4),
77 __field(u32, op1)
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/linux/arch/powerpc/math-emu/
H A Dmath.c28 #define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
228 void *op0 = NULL, *op1 = NULL, *op2 = NULL, *op3 = NULL; in do_mathemu() local
333 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
339 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
345 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
354 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); in do_mathemu()
364 op1 = (void *)(regs->gpr[idx] + sdisp); in do_mathemu()
373 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
378 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
384 op1 in do_mathemu()
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/linux/arch/arm/include/asm/
H A Datomic.h311 #define ATOMIC64_OP(op, op1, op2) \ argument
320 " " #op1 " %Q0, %Q0, %Q4\n" \
330 #define ATOMIC64_OP_RETURN(op, op1, op2) \ argument
341 " " #op1 " %Q0, %Q0, %Q4\n" \
353 #define ATOMIC64_FETCH_OP(op, op1, op2) \ argument
364 " " #op1 " %Q1, %Q0, %Q5\n" \
376 #define ATOMIC64_OPS(op, op1, op2) \ argument
377 ATOMIC64_OP(op, op1, op2) \
378 ATOMIC64_OP_RETURN(op, op1, op2) \
379 ATOMIC64_FETCH_OP(op, op1, op
390 ATOMIC64_OPS(op,op1,op2) ATOMIC64_OPS() argument
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/linux/arch/sh/kernel/
H A Dkprobes.c144 struct kprobe *op1, *op2; in prepare_singlestep() local
148 op1 = this_cpu_ptr(&saved_next_opcode); in prepare_singlestep()
153 op1->addr = (kprobe_opcode_t *) regs->regs[reg_nr]; in prepare_singlestep()
156 op1->addr = in prepare_singlestep()
161 op1->addr = in prepare_singlestep()
166 op1->addr = (kprobe_opcode_t *) regs->pr; in prepare_singlestep()
171 op1->addr = p->addr + 1; in prepare_singlestep()
181 op1->addr = p->addr + 2; in prepare_singlestep()
189 op1->addr = p->addr + 1; in prepare_singlestep()
192 op1 in prepare_singlestep()
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/linux/lib/zlib_dfltcc/
H A Ddfltcc_util.h32 Byte **op1, in dfltcc() argument
39 Byte *t2 = op1 ? *op1 : NULL; in dfltcc()
90 if (op1) in dfltcc()
91 *op1 = t2; in dfltcc()
/linux/arch/x86/crypto/
H A Dcast6-avx-x86_64-asm_64.S85 #define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \ argument
91 op1 (RID1,RID2,4), dst ## d; \
115 #define F_tail(a, x, gi1, gi2, op1, op2, op3) \ argument
116 lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
117 lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
119 lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \
122 lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \
129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ argument
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
134 F_tail(b2, RTMP, RGI3, RGI4, op1, op
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H A Dcast5-avx-x86_64-asm_64.S85 #define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \ argument
91 op1 (RID1,RID2,4), dst ## d; \
115 #define F_tail(a, x, gi1, gi2, op1, op2, op3) \ argument
116 lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
117 lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
119 lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \
122 lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \
129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ argument
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
134 F_tail(b2, RTMP, RGI3, RGI4, op1, op
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H A Dpolyval-clmulni_glue.c48 asmlinkage void clmul_polyval_mul(u8 *op1, const u8 *op2);
63 static void internal_polyval_mul(u8 *op1, const u8 *op2) in internal_polyval_mul() argument
66 clmul_polyval_mul(op1, op2); in internal_polyval_mul()
/linux/arch/arm64/tools/
H A Dgen-sysreg.awk156 op1 = $4
165 define("REG_" reg, "S" op0 "_" op1 "_C" crn "_C" crm "_" op2)
166 define("SYS_" reg, "sys_reg(" op0 ", " op1 ", " crn ", " crm ", " op2 ")")
169 define("SYS_" reg "_Op1", op1)
197 op1 = null
/linux/tools/arch/arm/include/uapi/asm/
H A Dkvm.h166 #define __ARM_CP15_REG(op1,crn,crm,op2) \ argument
168 ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \
175 #define __ARM_CP15_REG64(op1,crm) \ argument
176 (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64)
/linux/tools/arch/arm64/include/asm/
H A Desr.h215 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ argument
217 ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \
229 * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0)
249 * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
331 #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \ argument
332 (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \
352 #define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \ argument
353 (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \
/linux/drivers/gpu/host1x/
H A Dcdma.c138 static void host1x_pushbuffer_push(struct push_buffer *pb, u32 op1, u32 op2) in host1x_pushbuffer_push() argument
143 *(p++) = op1; in host1x_pushbuffer_push()
590 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2) in host1x_cdma_push() argument
597 op1, op2); in host1x_cdma_push()
605 host1x_pushbuffer_push(pb, op1, op2); in host1x_cdma_push()
617 void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2, in host1x_cdma_push_wide() argument
626 trace_host1x_cdma_push_wide(dev_name(channel->dev), op1, op2, in host1x_cdma_push_wide()
650 host1x_pushbuffer_push(pb, op1, op2); in host1x_cdma_push_wide()
H A Dcdma.h83 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
84 void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
/linux/arch/arm64/crypto/
H A Dpolyval-ce-glue.c43 asmlinkage void pmull_polyval_mul(u8 *op1, const u8 *op2);
53 static void internal_polyval_mul(u8 *op1, const u8 *op2) in internal_polyval_mul() argument
56 pmull_polyval_mul(op1, op2); in internal_polyval_mul()
/linux/arch/arm64/include/asm/
H A Desr.h234 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ argument
236 ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \
248 * op0=1, op1=3, op2=1, crn=7, crm={ 5, 10, 11, 12, 13, 14 }, WRITE (L=0)
268 * op0 = 3, op1= 0, crn = 0, {crm = 0, 4-7}, READ (L = 1)
350 #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \ argument
351 (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \
371 #define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \ argument
372 (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \
/linux/arch/x86/kvm/vmx/
H A Dvmx_ops.h191 #define vmx_asm1(insn, op1, error_args...) \ argument
197 : : op1 : "cc" : error, fault); \
208 #define vmx_asm2(insn, op1, op2, error_args...) \ argument
214 : : op1, op2 : "cc" : error, fault); \
/linux/tools/arch/arm64/include/uapi/asm/
H A Dkvm.h247 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
250 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
536 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7},
545 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \ argument
547 __u64 __op1 = (op1) & 3; \
/linux/arch/arm64/include/uapi/asm/
H A Dkvm.h247 #define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \ argument
250 ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
536 * AArch64 with op0==3, op1=={0, 1, 3}, CRn==0, CRm=={0-7},
545 #define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \ argument
547 __u64 __op1 = (op1) & 3; \
/linux/drivers/gpu/host1x/hw/
H A Dchannel_hw.c145 u32 op1 = host1x_opcode_gather_wide(g->words); in submit_gathers() local
148 host1x_cdma_push_wide(cdma, op1, op2, op3, op4); in submit_gathers()
155 u32 op1 = host1x_opcode_gather(g->words); in submit_gathers() local
157 host1x_cdma_push(cdma, op1, op2); in submit_gathers()
/linux/lib/zstd/decompress/
H A Dhuf_decompress.c632 BYTE* op1 = ostart; in HUF_decompress4X1_usingDTable_internal_body() local
651 HUF_DECODE_SYMBOLX1_2(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
655 HUF_DECODE_SYMBOLX1_1(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
659 HUF_DECODE_SYMBOLX1_2(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
663 HUF_DECODE_SYMBOLX1_0(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
677 if (op1 > opStart2) return ERROR(corruption_detected); in HUF_decompress4X1_usingDTable_internal_body()
683 HUF_decodeStreamX1(op1, &bitD1, opStart2, dt, dtLog); in HUF_decompress4X1_usingDTable_internal_body()
1413 BYTE* op1 = ostart; in HUF_decompress4X2_usingDTable_internal_body() local
1433 HUF_DECODE_SYMBOLX2_2(op1, &bitD1); in HUF_decompress4X2_usingDTable_internal_body()
1434 HUF_DECODE_SYMBOLX2_1(op1, in HUF_decompress4X2_usingDTable_internal_body()
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