Searched refs:mvdd_dependency_on_mclk (Results 1 – 8 of 8) sorted by relevance
1328 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL; in init_clock_voltage_dependency() 1463 &hwmgr->dyn_state.mvdd_dependency_on_mclk, table); in init_clock_voltage_dependency() 1763 kfree(hwmgr->dyn_state.mvdd_dependency_on_mclk); in pp_tables_uninitialize() 1764 hwmgr->dyn_state.mvdd_dependency_on_mclk = NULL; in pp_tables_uninitialize()
337 hwmgr->dyn_state.mvdd_dependency_on_mclk); in smu7_construct_voltage_tables() 850 allowed_vdd_mclk_table = hwmgr->dyn_state.mvdd_dependency_on_mclk; in smu7_setup_dpm_tables_v0()
1203 if (NULL != hwmgr->dyn_state.mvdd_dependency_on_mclk) { in ci_populate_single_memory_level() 1205 hwmgr->dyn_state.mvdd_dependency_on_mclk, in ci_populate_single_memory_level() 1359 for (i = 0; i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count; i++) { in ci_populate_mvdd_value() 1360 if (mclk <= hwmgr->dyn_state.mvdd_dependency_on_mclk->entries[i].clk) { in ci_populate_mvdd_value() 1367 PP_ASSERT_WITH_CODE(i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count, in ci_populate_mvdd_value()
1404 for (i = 0; i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count; i++) { in iceland_populate_mvdd_value() 1405 if (mclk <= hwmgr->dyn_state.mvdd_dependency_on_mclk->entries[i].clk) { in iceland_populate_mvdd_value() 1412 PP_ASSERT_WITH_CODE(i < hwmgr->dyn_state.mvdd_dependency_on_mclk->count, in iceland_populate_mvdd_value()
204 struct amdgpu_clock_voltage_dependency_table mvdd_dependency_on_mclk; member
633 struct phm_clock_voltage_dependency_table *mvdd_dependency_on_mclk; member
956 ret = r600_parse_clk_voltage_dep_table(&rdev->pm.dpm.dyn_state.mvdd_dependency_on_mclk, in r600_parse_extended_power_table() 1303 kfree(dyn_state->mvdd_dependency_on_mclk.entries); in r600_free_extended_power_table()
1466 struct radeon_clock_voltage_dependency_table mvdd_dependency_on_mclk; member