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Searched refs:mmVM_L2_CNTL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_3_0_offset.h1281 #define mmVM_L2_CNTL_BASE_IDX 0 macro
H A Dmmhub_1_0_offset.h1288 #define mmVM_L2_CNTL_BASE_IDX 0 macro
H A Dmmhub_9_1_offset.h1297 #define mmVM_L2_CNTL_BASE_IDX 0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h1166 #define mmVM_L2_CNTL_BASE_IDX 0 macro
H A Dgc_9_2_1_offset.h1130 #define mmVM_L2_CNTL_BASE_IDX 0 macro
H A Dgc_9_1_offset.h1192 #define mmVM_L2_CNTL_BASE_IDX 0 macro