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Searched refs:mmRCC_PEER_REG_RANGE1_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_1_offset.h960 #define mmRCC_PEER_REG_RANGE1_BASE_IDX 0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_6_1_offset.h2389 #define mmRCC_PEER_REG_RANGE1_BASE_IDX 2 macro
H A Dnbio_7_0_offset.h4273 #define mmRCC_PEER_REG_RANGE1_BASE_IDX 2 macro
H A Dnbio_7_4_offset.h2713 #define mmRCC_PEER_REG_RANGE1_BASE_IDX 2 macro
H A Dnbio_2_3_offset.h373 #define mmRCC_PEER_REG_RANGE1_BASE_IDX 2 macro
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