Searched refs:cp_hqd_pq_wptr_poll_addr_lo (Results 1 – 21 of 21) sorted by relevance
92 uint32_t cp_hqd_pq_wptr_poll_addr_lo; member
301 uint32_t cp_hqd_pq_wptr_poll_addr_lo; member
311 uint32_t cp_hqd_pq_wptr_poll_addr_lo; member
816 uint32_t cp_hqd_pq_wptr_poll_addr_lo; // offset: 141 (0x8D) member
817 uint32_t cp_hqd_pq_wptr_poll_addr_lo; member
199 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd()
183 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd()
236 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd()
260 m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr); in update_mqd()
317 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v10_3()
302 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v11()
1127 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init() 1220 mqd->cp_hqd_pq_wptr_poll_addr_lo); in mes_v11_0_queue_init_register()
1209 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_0_mqd_init() 1309 mqd->cp_hqd_pq_wptr_poll_addr_lo); in mes_v12_0_queue_init_register()
331 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_hiq_mqd_load()
342 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_gfx_v9_hiq_mqd_load()
1922 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init() 2023 mqd->cp_hqd_pq_wptr_poll_addr_lo); in gfx_v9_4_3_xcc_kiq_init_register()
3192 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_compute_mqd_init() 3313 mqd->cp_hqd_pq_wptr_poll_addr_lo); in gfx_v12_0_kiq_init_register()
3643 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init() 3743 mqd->cp_hqd_pq_wptr_poll_addr_lo); in gfx_v9_0_kiq_init_register()
2885 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
4469 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()