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Searched refs:bits_per_component (Results 1 – 19 of 19) sorted by relevance

/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c120 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; in drm_dsc_pps_payload_pack()
290 if (vdsc_cfg->bits_per_component <= 10) in drm_dsc_set_const_params()
1221 u8 bits_per_component) in get_rc_params() argument
1227 rc_parameters[i].bpc == bits_per_component) in get_rc_params()
1236 * Required bits_per_pixel and bits_per_component to be set before calling this
1251 !vdsc_cfg->bits_per_component)) in drm_dsc_setup_rc_params()
1273 vdsc_cfg->bits_per_component); in drm_dsc_setup_rc_params()
1345 (4 * vdsc_cfg->bits_per_component + 4) in drm_dsc_compute_rc_parameters()
1349 (4 * vdsc_cfg->bits_per_component + 4) + in drm_dsc_compute_rc_parameters()
1350 3 * (4 * vdsc_cfg->bits_per_component) in drm_dsc_compute_rc_parameters()
[all...]
/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Drc_calc.c53 bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10) in calc_rc_params()
H A Drc_calc_dpi.c32 to->bits_per_component = from->bits_per_component; in copy_pps_fields()
111 dsc_cfg.mux_word_size = dsc_params->pps.bits_per_component <= 10 ? 48 : 64; in dscc_compute_dsc_parameters()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c288 DC_LOG_DSC("\tbits_per_component %d", pps->bits_per_component); in dsc_log_pps()
403 dsc_reg_vals->pps.bits_per_component = dsc_dc_color_depth_to_dsc_bits_per_comp(dsc_cfg->color_depth); in dsc_prepare_config()
533 reg_vals->pps.bits_per_component = 8; in dsc_init_reg_values()
591 DSCCIF_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); in dsc_write_to_registers()
626 DSCC_PPS_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); in dsc_write_to_registers()
/linux/include/drm/display/
H A Ddrm_dsc.h79 * @bits_per_component: Bits per component to code (8/10/12)
81 u8 bits_per_component; member
307 * PPS3[7:4] - bits_per_component: Bits per component for the original
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc_1_2.c153 data |= dsc->bits_per_component & 0xf; in dpu_hw_dsc_config_1_2()
229 if (dsc->bits_per_component == 8) in dpu_hw_dsc_config_1_2()
H A Ddpu_hw_dsc.c55 bool input_10_bits = dsc->bits_per_component == 10; in dpu_hw_dsc_config()
H A Ddpu_encoder_phys_vid.c137 (dsc->bits_per_component * 3); in drm_mode_to_intf_timing_params()
H A Ddpu_encoder.c1975 ssm_delay = ((dsc->bits_per_component < 10) ? 84 : 92); in dpu_encoder_dsc_initial_line_calc()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c213 DSCCIF_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); in dsc_write_to_registers()
248 DSCC_PPS_CONFIG0__BITS_PER_COMPONENT, reg_vals->pps.bits_per_component); in dsc_write_to_registers()
/linux/drivers/gpu/drm/panel/
H A Dpanel-lg-sw43408.c283 ctx->dsc.bits_per_component = 8; in sw43408_probe()
H A Dpanel-novatek-nt37801.c297 ctx->dsc.bits_per_component = 8; in novatek_nt37801_probe()
H A Dpanel-samsung-s6e3ha8.c298 priv->dsc.bits_per_component = 8; in s6e3ha8_amb577px01_wqhd_probe()
H A Dpanel-visionox-r66451.c275 dsc->bits_per_component = 8; in visionox_r66451_probe()
H A Dpanel-raydium-rm692e5.c330 ctx->dsc.bits_per_component = 8; in rm692e5_probe()
H A Dpanel-visionox-rm692e5.c403 ctx->dsc.bits_per_component = 10; in visionox_rm692e5_probe()
/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c591 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression()
1823 switch (dsc->bits_per_component) { in dsi_populate_dsc_params()
1835 "Unsupported bits_per_component value: %d\n", in dsi_populate_dsc_params()
1836 dsc->bits_per_component); in dsi_populate_dsc_params()
1855 dsc->line_buf_depth = dsc->bits_per_component + 1; in dsi_populate_dsc_params()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_debugfs.c1023 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component); in i915_dsc_bpc_show()
H A Dintel_display.c5391 PIPE_CONF_CHECK_I(dsc.config.bits_per_component); in intel_pipe_config_compare()