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Searched refs:SCTLR_ELx_M (Results 1 – 11 of 11) sorted by relevance

/linux/arch/arm64/kvm/hyp/nvhe/
H A Dtlb.c93 if (!(val & SCTLR_ELx_M)) { in enter_vmid_context()
94 val |= SCTLR_ELx_M; in enter_vmid_context()
100 cxt->sctlr = SCTLR_ELx_M; in enter_vmid_context()
139 if (!(cxt->sctlr & SCTLR_ELx_M)) { in exit_vmid_context()
H A Dhyp-init.S290 bic x4, x3, #SCTLR_ELx_M
H A Dswitch.c92 write_sysreg_el1(val | SCTLR_ELx_M, SYS_SCTLR); in __deactivate_traps()
/linux/arch/arm64/kernel/
H A Dhead.S144 and x19, x19, #SCTLR_ELx_M // isolate M bit
155 bic x19, x19, #SCTLR_ELx_M
/linux/arch/arm64/kernel/pi/
H A Dmap_kernel.c156 :: "r"(sctlr & ~SCTLR_ELx_M), "r"(ttbr), "r"(tcr), "r"(sctlr)); in set_ttbr0_for_lpa2()
/linux/arch/arm64/include/asm/
H A Dkvm_mmu.h204 u64 cache_bits = SCTLR_ELx_M | SCTLR_ELx_C; in vcpu_has_cache_enabled()
H A Dkvm_nested.h53 val &= (SCTLR_ELx_M | SCTLR_ELx_A | SCTLR_ELx_C | SCTLR_ELx_SA | in translate_sctlr_el2_to_sctlr_el1()
H A Dsysreg.h849 #define SCTLR_ELx_M (BIT(0)) macro
864 (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | SCTLR_ELx_I | \
883 (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | \
/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h848 #define SCTLR_ELx_M (BIT(0)) macro
863 (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | SCTLR_ELx_I | \
882 (SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_SA | \
/linux/tools/testing/selftests/kvm/lib/arm64/
H A Dprocessor.c353 sctlr_el1 |= SCTLR_ELx_M | SCTLR_ELx_C | SCTLR_ELx_I; in aarch64_vcpu_setup()
/linux/arch/arm64/kvm/
H A Dat.c167 if (!(sctlr & SCTLR_ELx_M)) in setup_s1_walk()