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Searched refs:RING_TAIL (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
H A Dintel_ring_submission.c179 ENGINE_WRITE_FW(engine, RING_HEAD, ENGINE_READ_FW(engine, RING_TAIL)); in stop_ring()
188 ENGINE_WRITE_FW(engine, RING_TAIL, 0); in stop_ring()
253 ENGINE_WRITE_FW(engine, RING_TAIL, ring->head); in xcs_resume()
254 if (ENGINE_READ_FW(engine, RING_HEAD) != ENGINE_READ_FW(engine, RING_TAIL)) { in xcs_resume()
257 ENGINE_READ_FW(engine, RING_TAIL), in xcs_resume()
282 ENGINE_WRITE_FW(engine, RING_TAIL, ring->tail); in xcs_resume()
283 ENGINE_POSTING_READ(engine, RING_TAIL); in xcs_resume()
297 ENGINE_READ(engine, RING_TAIL), ring->tail, in xcs_resume()
366 ENGINE_READ_FW(engine, RING_TAIL), in reset_prepare()
381 ENGINE_READ_FW(engine, RING_TAIL), in reset_prepare()
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H A Dintel_engine_regs.h12 #define RING_TAIL(base) _MMIO((base) + 0x30) macro
H A Dintel_gt.c148 intel_uncore_write(uncore, RING_TAIL(base), 0); in init_unused_ring()
441 RING_TAIL(RENDER_RING_BASE)); in intel_gt_flush_ggtt_writes()
H A Dselftest_lrc.c320 i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)), in live_lrc_fixed()
322 "RING_TAIL" in live_lrc_fixed()
452 *cs++ = i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)); in __live_lrc_state()
1354 case 0x34: /* RING_TAIL */ in compare_isolation()
H A Dintel_execlists_submission.c679 * We should never submit the context with the same RING_TAIL twice in execlists_update_context()
683 * the normal request to be able to always advance the RING_TAIL on in execlists_update_context()
689 * lite-restore and force it to reload the RING_TAIL. Otherwise, the in execlists_update_context()
1277 * has a (RING_START, RING_HEAD, RING_TAIL) tuple. RING_START is in execlists_dequeue()
1281 * where it got up to last time, and through RING_TAIL we tell the CS in execlists_dequeue()
1286 * can combine these requests into a single RING_TAIL update: in execlists_dequeue()
1289 * ^- RING_TAIL in execlists_dequeue()
1496 * by updating the RING_TAIL to point to the end of the in execlists_dequeue()
1969 ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR, in process_csb()
/linux/drivers/gpu/drm/xe/regs/
H A Dxe_engine_regs.h50 #define RING_TAIL(base) XE_REG((base) + 0x30) macro
/linux/drivers/gpu/drm/i915/
H A Di915_pmu.c396 tail = ENGINE_READ_FW(engine, RING_TAIL); in gen2_engine_sample()
H A Dintel_gvt_mmio_table.c91 MMIO_RING_D(RING_TAIL); in iterate_generic_mmio()
H A Di915_gpu_error.c1281 ee->tail = ENGINE_READ(engine, RING_TAIL); in engine_record_registers()
/linux/drivers/gpu/drm/xe/
H A Dxe_guc_capture.c114 { RING_TAIL(0), REG_32BIT, 0, 0, 0, "RING_TAIL"}, \
/linux/drivers/gpu/drm/i915/gvt/
H A Dscheduler.c972 vgpu_vreg_t(vgpu, RING_TAIL(ring_base)) = tail; in update_guest_context()
H A Dhandlers.c2242 MMIO_RING_DFH(RING_TAIL, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()