/linux/arch/powerpc/perf/ |
H A D | isa207-common.c | 223 ret = PH(LVL, L1) | LEVEL(L1) | P(SNOOP, HIT); in isa207_find_source() 226 ret = PH(LVL, L2) | LEVEL(L2) | P(SNOOP, HIT); in isa207_find_source() 229 ret = PH(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); in isa207_find_source() 233 ret = P(SNOOP, HIT); in isa207_find_source() 238 ret |= P(LVL, HIT) | LEVEL(PMEM); in isa207_find_source() 242 ret |= P(LVL, HIT) | LEVEL(PMEM) | REM; in isa207_find_source() 252 ret |= P(SNOOP, HIT); in isa207_find_source() 260 ret |= PH(LVL, L2) | LEVEL(L2) | P(SNOOP, HIT); in isa207_find_source() 264 ret |= PH(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); in isa207_find_source() 269 ret = PH(LVL, L2) | LEVEL(L2) | REM | P(SNOOP, HIT) | in isa207_find_source() [all...] |
H A D | isa207-common.h | 275 #define PH(a, b) (P(LVL, HIT) | P(a, b))
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/linux/tools/perf/util/ |
H A D | mem-events.c | 322 "HIT", 369 "HIT", 674 if (lvl & P(LVL, HIT)) { in c2c_decode_stats() 700 if (snoop & P(SNOOP, HIT)) in c2c_decode_stats() 710 if (snoop & P(SNOOP, HIT)) in c2c_decode_stats() 720 if (snoop & P(SNOOP, HIT)) { in c2c_decode_stats() 742 if (lvl & P(LVL, HIT)) { in c2c_decode_stats()
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H A D | intel-pt.c | 2278 #define OP_LH (P(OP, LOAD) | P(LVL, HIT)) 2293 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* L3 hit|SNP Hit */ 2298 OP_LH | P(LVL, LOC_RAM) | LEVEL(RAM) | P(SNOOP, HIT), /* RAM hit|SNP Hit */ 2299 OP_LH | P(LVL, REM_RAM1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* Remote L3 hit|SNP Hit */ 2314 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* L3 hit|SNP HitM */ 2337 *val |= P(TLB, HIT) | P(TLB, L1) | P(TLB, L2); in pebs_set_tlb_lock()
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/linux/arch/x86/events/intel/ |
H A D | ds.c | 84 #define OP_LH (P(OP, LOAD) | P(LVL, HIT)) 97 OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT), /* 0x06: L3 hit, snoop hit */ 99 OP_LH | P(LVL, REM_CCE1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* 0x08: L3 miss snoop hit */ 101 OP_LH | P(LVL, LOC_RAM) | LEVEL(RAM) | P(SNOOP, HIT), /* 0x0a: L3 miss, shared */ 102 OP_LH | P(LVL, REM_RAM1) | REM | LEVEL(L3) | P(SNOOP, HIT), /* 0x0b: L3 miss, shared */ 112 pebs_data_source[0x05] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); in intel_pmu_pebs_data_source_nhm() 121 data_source[0x08] = OP_LH | pmem_or_l4 | P(SNOOP, HIT); in __intel_pmu_pebs_data_source_skl() 122 data_source[0x09] = OP_LH | pmem_or_l4 | REM | P(SNOOP, HIT); in __intel_pmu_pebs_data_source_skl() 135 data_source[0x05] = OP_LH | P(LVL, L3) | LEVEL(L3) | P(SNOOP, HIT); in __intel_pmu_pebs_data_source_grt() 248 val |= P(TLB, HIT); in precise_store_data() [all...] |
H A D | p4.c | 99 P4_ESCR_EMASK_BIT(P4_EVENT_ITLB_REFERENCE, HIT) | 549 [ C(RESULT_ACCESS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, HIT,
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/linux/Documentation/admin-guide/device-mapper/ |
H A D | cache-policies.rst | 12 The policy can return a simple HIT or MISS or issue a migration.
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/linux/drivers/iommu/ |
H A D | msm_iommu_hw-8xxx.h | 611 #define SET_HIT(b, c, v) SET_CONTEXT_FIELD(b, c, V2PSR, HIT, v) 798 #define GET_HIT(b, c) GET_CONTEXT_FIELD(b, c, V2PSR, HIT) 1178 #define HIT (HIT_MASK << HIT_SHIFT) macro
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