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Searched refs:EN0_DCFG (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/net/ethernet/8390/
H A D8390.h191 #define EN0_DCFG EI_SHIFT(0x0e) /* Data configuration reg WR */ macro
207 /* Bits in EN0_DCFG - Data config register */
H A Dne2k-pci.c313 {0x49, EN0_DCFG}, in ne2k_pci_init_one()
348 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
H A Dne.c371 {0x48, EN0_DCFG}, /* Set byte-wide (0x48) access. */ in ne_probe1()
401 outb_p(DCR_VAL, ioaddr + EN0_DCFG); in ne_probe1()
H A Dax88796.c669 ei_outb(ax->plat->dcr_val & ~1, ioaddr + EN0_DCFG); in ax_initial_setup()
741 ei_outb(ax->plat->dcr_val, ei_local->mem + EN0_DCFG); in ax_init_dev()
H A Daxnet_cs.c198 {0x01, EN0_DCFG}, /* Set word-wide access. */ in get_prom()
1638 outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in AX88190_init()
H A Dlib8390.c1026 ei_outb_p(endcfg, e8390_base + EN0_DCFG); /* 0x48 or 0x49 */ in __NS8390_init()