1// SPDX-License-Identifier: GPL-2.0-only OR MIT 2/* 3 * Common dtsi for AM62x SK and derivatives 4 * 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 6 */ 7 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/net/ti-dp83867.h> 11#include "k3-am625.dtsi" 12 13/ { 14 aliases { 15 serial0 = &wkup_uart0; 16 serial1 = &mcu_uart0; 17 serial2 = &main_uart0; 18 mmc0 = &sdhci0; 19 mmc1 = &sdhci1; 20 mmc2 = &sdhci2; 21 spi0 = &ospi0; 22 ethernet0 = &cpsw_port1; 23 ethernet1 = &cpsw_port2; 24 usb0 = &usb0; 25 usb1 = &usb1; 26 }; 27 28 chosen { 29 stdout-path = "serial2:115200n8"; 30 }; 31 32 memory@80000000 { 33 bootph-pre-ram; 34 device_type = "memory"; 35 /* 2G RAM */ 36 reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 37 }; 38 39 reserved-memory { 40 #address-cells = <2>; 41 #size-cells = <2>; 42 ranges; 43 44 ramoops@9ca00000 { 45 compatible = "ramoops"; 46 reg = <0x00 0x9ca00000 0x00 0x00100000>; 47 record-size = <0x8000>; 48 console-size = <0x8000>; 49 ftrace-size = <0x00>; 50 pmsg-size = <0x8000>; 51 }; 52 53 /* global cma region */ 54 linux,cma { 55 compatible = "shared-dma-pool"; 56 reusable; 57 size = <0x00 0x8000000>; 58 linux,cma-default; 59 }; 60 61 mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 { 62 compatible = "shared-dma-pool"; 63 reg = <0x00 0x9cb00000 0x00 0x100000>; 64 no-map; 65 }; 66 67 mcu_m4fss_memory_region: m4f-memory@9cc00000 { 68 compatible = "shared-dma-pool"; 69 reg = <0x00 0x9cc00000 0x00 0xe00000>; 70 no-map; 71 }; 72 73 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9da00000 { 74 compatible = "shared-dma-pool"; 75 reg = <0x00 0x9da00000 0x00 0x100000>; 76 no-map; 77 }; 78 79 wkup_r5fss0_core0_memory_region: r5f-memory@9db00000 { 80 compatible = "shared-dma-pool"; 81 reg = <0x00 0x9db00000 0x00 0xc00000>; 82 no-map; 83 }; 84 85 secure_tfa_ddr: tfa@9e780000 { 86 reg = <0x00 0x9e780000 0x00 0x80000>; 87 alignment = <0x1000>; 88 no-map; 89 }; 90 91 secure_ddr: optee@9e800000 { 92 reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 93 alignment = <0x1000>; 94 no-map; 95 }; 96 97 }; 98 99 leds { 100 compatible = "gpio-leds"; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&usr_led_pins_default>; 103 104 led-0 { 105 label = "am62-sk:green:heartbeat"; 106 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 107 linux,default-trigger = "heartbeat"; 108 function = LED_FUNCTION_HEARTBEAT; 109 default-state = "off"; 110 }; 111 }; 112 113 tlv320_mclk: clk-0 { 114 #clock-cells = <0>; 115 compatible = "fixed-clock"; 116 clock-frequency = <12288000>; 117 }; 118 119 codec_audio: sound { 120 compatible = "simple-audio-card"; 121 simple-audio-card,name = "AM62x-SKEVM"; 122 simple-audio-card,widgets = 123 "Headphone", "Headphone Jack", 124 "Line", "Line In", 125 "Microphone", "Microphone Jack"; 126 simple-audio-card,routing = 127 "Headphone Jack", "HPLOUT", 128 "Headphone Jack", "HPROUT", 129 "LINE1L", "Line In", 130 "LINE1R", "Line In", 131 "MIC3R", "Microphone Jack", 132 "Microphone Jack", "Mic Bias"; 133 simple-audio-card,format = "dsp_b"; 134 simple-audio-card,bitclock-master = <&sound_master>; 135 simple-audio-card,frame-master = <&sound_master>; 136 simple-audio-card,bitclock-inversion; 137 138 simple-audio-card,cpu { 139 sound-dai = <&mcasp1>; 140 }; 141 142 sound_master: simple-audio-card,codec { 143 sound-dai = <&tlv320aic3106>; 144 clocks = <&tlv320_mclk>; 145 }; 146 }; 147 148 hdmi0: connector-hdmi { 149 compatible = "hdmi-connector"; 150 label = "hdmi"; 151 type = "a"; 152 port { 153 hdmi_connector_in: endpoint { 154 remote-endpoint = <&sii9022_out>; 155 }; 156 }; 157 }; 158}; 159 160&phy_gmii_sel { 161 bootph-all; 162}; 163 164&main_pmx0 { 165 /* First pad number is ALW package and second is AMC package */ 166 main_uart0_pins_default: main-uart0-default-pins { 167 bootph-all; 168 pinctrl-single,pins = < 169 AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */ 170 AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */ 171 >; 172 }; 173 174 main_uart1_pins_default: main-uart1-default-pins { 175 bootph-pre-ram; 176 pinctrl-single,pins = < 177 AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */ 178 AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */ 179 AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */ 180 AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */ 181 >; 182 }; 183 184 main_i2c0_pins_default: main-i2c0-default-pins { 185 pinctrl-single,pins = < 186 AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16/E12) I2C0_SCL */ 187 AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */ 188 >; 189 }; 190 191 main_i2c1_pins_default: main-i2c1-default-pins { 192 bootph-all; 193 pinctrl-single,pins = < 194 AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */ 195 AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */ 196 >; 197 }; 198 199 main_i2c2_pins_default: main-i2c2-default-pins { 200 pinctrl-single,pins = < 201 AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */ 202 AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */ 203 >; 204 }; 205 206 main_mmc1_pins_default: main-mmc1-default-pins { 207 bootph-all; 208 pinctrl-single,pins = < 209 AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */ 210 AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */ 211 AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */ 212 AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */ 213 AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */ 214 AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */ 215 AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17/C15) MMC1_SDCD */ 216 >; 217 }; 218 219 usr_led_pins_default: usr-led-default-pins { 220 pinctrl-single,pins = < 221 AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17/B15) MMC1_SDWP.GPIO1_49 */ 222 >; 223 }; 224 225 main_mdio1_pins_default: main-mdio1-default-pins { 226 pinctrl-single,pins = < 227 AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24/V17) MDIO0_MDC */ 228 AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */ 229 >; 230 }; 231 232 main_rgmii1_pins_default: main-rgmii1-default-pins { 233 bootph-all; 234 pinctrl-single,pins = < 235 AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */ 236 AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */ 237 AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16/AA17) RGMII1_RD2 */ 238 AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15/Y15) RGMII1_RD3 */ 239 AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17/AA16) RGMII1_RXC */ 240 AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17/W14) RGMII1_RX_CTL */ 241 AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20/U14) RGMII1_TD0 */ 242 AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20/AA19) RGMII1_TD1 */ 243 AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18/Y17) RGMII1_TD2 */ 244 AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18/AA18) RGMII1_TD3 */ 245 AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19/W16) RGMII1_TXC */ 246 AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */ 247 >; 248 }; 249 250 main_usb1_pins_default: main-usb1-default-pins { 251 pinctrl-single,pins = < 252 AM62X_IOPAD(0x0258, PIN_OUTPUT | PIN_DS_PULLUD_ENABLE | PIN_DS_PULL_UP, 0) /* (F18/E16) USB1_DRVVBUS */ 253 >; 254 }; 255 256 main_mcasp1_pins_default: main-mcasp1-default-pins { 257 pinctrl-single,pins = < 258 AM62X_IOPAD(0x090, PIN_INPUT, 2) /* (M24/K17) GPMC0_BE0N_CLE.MCASP1_ACLKX */ 259 AM62X_IOPAD(0x098, PIN_INPUT, 2) /* (U23/P21) GPMC0_WAIT0.MCASP1_AFSX */ 260 AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) /* (L25/J17) GPMC0_WEN.MCASP1_AXR0 */ 261 AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */ 262 >; 263 }; 264 265 main_dss0_pins_default: main-dss0-default-pins { 266 pinctrl-single,pins = < 267 AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */ 268 AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ 269 AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */ 270 AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */ 271 AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ 272 AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */ 273 AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */ 274 AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */ 275 AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */ 276 AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */ 277 AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */ 278 AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */ 279 AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */ 280 AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */ 281 AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */ 282 AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */ 283 AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */ 284 AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */ 285 AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */ 286 AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */ 287 AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */ 288 AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */ 289 AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */ 290 AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */ 291 AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */ 292 AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */ 293 AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */ 294 AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */ 295 >; 296 }; 297 298 main_ecap0_pins_default: main-ecap0-default-pins { 299 pinctrl-single,pins = < 300 AM62X_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C13) SPI0_CS1.ECAP0_IN_APWM_OUT */ 301 >; 302 }; 303 304 main_ecap2_pins_default: main-ecap2-default-pins { 305 pinctrl-single,pins = < 306 AM62X_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (B20) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ 307 >; 308 }; 309 310 main_epwm1_pins_default: main-epwm1-default-pins { 311 pinctrl-single,pins = < 312 AM62X_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ 313 AM62X_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (E18) MCASP0_AXR0.EHRPWM1_B */ 314 >; 315 }; 316}; 317 318&mcu_pmx0 { 319 wkup_uart0_pins_default: wkup-uart0-default-pins { 320 bootph-pre-ram; 321 pinctrl-single,pins = < 322 AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */ 323 AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */ 324 AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4/B5) WKUP_UART0_RXD */ 325 AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */ 326 >; 327 }; 328}; 329 330&cpsw_mac_syscon { 331 bootph-all; 332}; 333 334&wkup_uart0 { 335 /* WKUP UART0 is used by DM firmware */ 336 bootph-pre-ram; 337 status = "reserved"; 338 pinctrl-names = "default"; 339 pinctrl-0 = <&wkup_uart0_pins_default>; 340}; 341 342&main_uart0 { 343 bootph-all; 344 status = "okay"; 345 pinctrl-names = "default"; 346 pinctrl-0 = <&main_uart0_pins_default>; 347}; 348 349&main_uart1 { 350 /* Main UART1 is used by TIFS firmware */ 351 bootph-pre-ram; 352 status = "reserved"; 353 pinctrl-names = "default"; 354 pinctrl-0 = <&main_uart1_pins_default>; 355}; 356 357&main_i2c0 { 358 status = "okay"; 359 pinctrl-names = "default"; 360 pinctrl-0 = <&main_i2c0_pins_default>; 361 clock-frequency = <400000>; 362 363 eeprom@51 { 364 /* AT24C512C-MAHM-T or M24512-DFMC6TG */ 365 compatible = "atmel,24c512"; 366 reg = <0x51>; 367 }; 368 369 typec_pd0: tps6598x@3f { 370 compatible = "ti,tps6598x"; 371 reg = <0x3f>; 372 373 connector { 374 compatible = "usb-c-connector"; 375 label = "USB-C"; 376 self-powered; 377 data-role = "dual"; 378 power-role = "sink"; 379 port { 380 usb_con_hs: endpoint { 381 remote-endpoint = <&usb0_hs_ep>; 382 }; 383 }; 384 }; 385 }; 386}; 387 388&main_i2c1 { 389 status = "okay"; 390 pinctrl-names = "default"; 391 pinctrl-0 = <&main_i2c1_pins_default>; 392 clock-frequency = <100000>; 393 394 tlv320aic3106: audio-codec@1b { 395 #sound-dai-cells = <0>; 396 compatible = "ti,tlv320aic3106"; 397 reg = <0x1b>; 398 ai3x-micbias-vg = <1>; /* 2.0V */ 399 400 /* Regulators */ 401 AVDD-supply = <&vcc_3v3_sys>; 402 IOVDD-supply = <&vcc_3v3_sys>; 403 DRVDD-supply = <&vcc_3v3_sys>; 404 }; 405 406 sii9022: bridge-hdmi@3b { 407 compatible = "sil,sii9022"; 408 reg = <0x3b>; 409 interrupt-parent = <&exp1>; 410 interrupts = <16 IRQ_TYPE_EDGE_FALLING>; 411 #sound-dai-cells = <0>; 412 sil,i2s-data-lanes = < 0 >; 413 414 ports { 415 #address-cells = <1>; 416 #size-cells = <0>; 417 418 port@0 { 419 reg = <0>; 420 421 sii9022_in: endpoint { 422 remote-endpoint = <&dpi1_out>; 423 }; 424 }; 425 426 port@1 { 427 reg = <1>; 428 429 sii9022_out: endpoint { 430 remote-endpoint = <&hdmi_connector_in>; 431 }; 432 }; 433 }; 434 }; 435}; 436 437&main_i2c2 { 438 status = "okay"; 439 pinctrl-names = "default"; 440 pinctrl-0 = <&main_i2c2_pins_default>; 441 clock-frequency = <400000>; 442}; 443 444&sdhci1 { 445 /* SD/MMC */ 446 bootph-all; 447 status = "okay"; 448 pinctrl-names = "default"; 449 pinctrl-0 = <&main_mmc1_pins_default>; 450 disable-wp; 451}; 452 453&cpsw3g { 454 bootph-all; 455 pinctrl-names = "default"; 456 pinctrl-0 = <&main_rgmii1_pins_default>; 457}; 458 459&cpsw_port1 { 460 bootph-all; 461 phy-mode = "rgmii-rxid"; 462 phy-handle = <&cpsw3g_phy0>; 463}; 464 465&cpsw3g_mdio { 466 bootph-all; 467 status = "okay"; 468 pinctrl-names = "default"; 469 pinctrl-0 = <&main_mdio1_pins_default>; 470 471 cpsw3g_phy0: ethernet-phy@0 { 472 bootph-all; 473 reg = <0>; 474 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 475 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 476 ti,min-output-impedance; 477 }; 478}; 479 480&mailbox0_cluster0 { 481 status = "okay"; 482 483 mbox_m4_0: mbox-m4-0 { 484 ti,mbox-rx = <0 0 0>; 485 ti,mbox-tx = <1 0 0>; 486 }; 487 488 mbox_r5_0: mbox-r5-0 { 489 ti,mbox-rx = <2 0 0>; 490 ti,mbox-tx = <3 0 0>; 491 }; 492}; 493 494&mcu_m4fss { 495 mboxes = <&mailbox0_cluster0 &mbox_m4_0>; 496 memory-region = <&mcu_m4fss_dma_memory_region>, 497 <&mcu_m4fss_memory_region>; 498 status = "okay"; 499}; 500 501&wkup_r5fss0 { 502 status = "okay"; 503}; 504 505&wkup_r5fss0_core0 { 506 mboxes = <&mailbox0_cluster0 &mbox_r5_0>; 507 memory-region = <&wkup_r5fss0_core0_dma_memory_region>, 508 <&wkup_r5fss0_core0_memory_region>; 509}; 510 511&usbss0 { 512 bootph-all; 513 status = "okay"; 514 ti,vbus-divider; 515}; 516 517&usbss1 { 518 status = "okay"; 519 ti,vbus-divider; 520}; 521 522&usb0 { 523 bootph-all; 524 usb-role-switch; 525 526 port { 527 usb0_hs_ep: endpoint { 528 remote-endpoint = <&usb_con_hs>; 529 }; 530 }; 531}; 532 533&usb1 { 534 dr_mode = "host"; 535 pinctrl-names = "default"; 536 pinctrl-0 = <&main_usb1_pins_default>; 537}; 538 539&mcasp1 { 540 status = "okay"; 541 #sound-dai-cells = <0>; 542 543 pinctrl-names = "default"; 544 pinctrl-0 = <&main_mcasp1_pins_default>; 545 546 op-mode = <0>; /* MCASP_IIS_MODE */ 547 tdm-slots = <2>; 548 549 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 550 1 0 2 0 551 0 0 0 0 552 0 0 0 0 553 0 0 0 0 554 >; 555}; 556 557&dss { 558 status = "okay"; 559 pinctrl-names = "default"; 560 pinctrl-0 = <&main_dss0_pins_default>; 561}; 562 563&dss_ports { 564 /* VP2: DPI Output */ 565 port@1 { 566 reg = <1>; 567 568 dpi1_out: endpoint { 569 remote-endpoint = <&sii9022_in>; 570 }; 571 }; 572}; 573 574/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */ 575&mcu_gpio0 { 576 status = "reserved"; 577}; 578 579&mcu_gpio_intr { 580 status = "reserved"; 581}; 582 583&ecap0 { 584 /* P26 of J3 */ 585 pinctrl-names = "default"; 586 pinctrl-0 = <&main_ecap0_pins_default>; 587 status = "okay"; 588}; 589 590&ecap2 { 591 /* P11 of J3 */ 592 pinctrl-names = "default"; 593 pinctrl-0 = <&main_ecap2_pins_default>; 594 status = "okay"; 595}; 596 597&epwm1 { 598 /* P36/P33 of J3 */ 599 pinctrl-names = "default"; 600 pinctrl-0 = <&main_epwm1_pins_default>; 601 status = "okay"; 602}; 603