Searched refs:stat_regs (Results 1 – 4 of 4) sorted by relevance
3917 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack() 3918 rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE); in r600_irq_ack() 3919 rdev->irq.stat_regs.r600.disp_int_cont2 = RREG32(DCE3_DISP_INTERRUPT_STATUS_CONTINUE2); in r600_irq_ack() 3921 rdev->irq.stat_regs.r600.hdmi0_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET0); in r600_irq_ack() 3922 rdev->irq.stat_regs.r600.hdmi1_status = RREG32(AFMT_STATUS + DCE3_HDMI_OFFSET1); in r600_irq_ack() 3924 rdev->irq.stat_regs.r600.hdmi0_status = RREG32(HDMI0_STATUS); in r600_irq_ack() 3925 rdev->irq.stat_regs.r600.hdmi1_status = RREG32(DCE3_HDMI1_STATUS); in r600_irq_ack() 3928 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack() 3929 rdev->irq.stat_regs.r600.disp_int_cont = RREG32(DISP_INTERRUPT_STATUS_CONTINUE); in r600_irq_ack() 3930 rdev->irq.stat_regs in r600_irq_ack() [all...]
4614 u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; in evergreen_irq_ack() 4615 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() 4616 u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; in evergreen_irq_ack() 4702 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() 4703 u32 *afmt_status = rdev->irq.stat_regs.evergreen.afmt_status; in evergreen_irq_process()
6128 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() 6129 u32 *grph_int = rdev->irq.stat_regs.evergreen.grph_int; in si_irq_ack() 6227 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process()
758 union radeon_irq_stat_regs stat_regs; member