Searched refs:rx_lev_trig (Results 1 – 2 of 2) sorted by relevance
256 * @rx_lev_trig: Rx FIFO watermark level (for IT & DMA mode)270 enum ssp_rx_level_trig rx_lev_trig; member
350 * @rx_lev_trig: receive FIFO watermark level which triggers IRQ377 enum ssp_rx_level_trig rx_lev_trig; member 828 switch (pl022->rx_lev_trig) { in configure_dma() 1398 switch (chip_info->rx_lev_trig) { in verify_controller_parameters() 1574 .rx_lev_trig = SSP_RX_1_OR_MORE_ELEM,1632 &chip_info_dt.rx_lev_trig); in pl022_setup() 1684 pl022->rx_lev_trig = chip_info->rx_lev_trig; in pl022_setup() 1769 SSP_WRITE_BITS(chip->cr1, chip_info->rx_lev_trig, in pl022_setup()