Searched refs:gpu_offset (Results 1 – 10 of 10) sorted by relevance
1150 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1222 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1234 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1246 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1258 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1282 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1302 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1506 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1523 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg() 1564 ib[idx] += (u32)((reloc->gpu_offset >> in evergreen_cs_handle_reg() [all...]
1020 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1082 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1084 track->vgt_strmout_bo_mc[tmp] = reloc->gpu_offset; in r600_cs_check_reg() 1103 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1212 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1243 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1279 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1282 track->cb_color_bo_mc[tmp] = reloc->gpu_offset; in r600_cs_check_reg() 1293 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in r600_cs_check_reg() 1295 track->db_bo_mc = reloc->gpu_offset; in r600_cs_check_reg() [all...]
191 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check() 204 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check() 228 ib[idx] = tmp + ((u32)reloc->gpu_offset); in r200_packet0_check() 230 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check() 274 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check() 368 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r200_packet0_check()
675 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 688 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 717 ((idx_value & ~31) + (u32)reloc->gpu_offset); in r300_packet0_check() 726 tmp = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 1087 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 1132 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r300_packet0_check() 1198 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); in r300_packet3_check()
1309 tmp += (((u32)reloc->gpu_offset) >> 10); in r100_reloc_pitch_offset() 1360 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); in r100_packet3_load_vbpntr() 1372 ib[idx+2] = radeon_get_ib_value(p, idx + 2) + ((u32)reloc->gpu_offset); in r100_packet3_load_vbpntr() 1386 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); in r100_packet3_load_vbpntr() 1627 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r100_packet0_check() 1640 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r100_packet0_check() 1661 ib[idx] = tmp + ((u32)reloc->gpu_offset); in r100_packet0_check() 1663 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r100_packet0_check() 1681 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r100_packet0_check() 1699 ib[idx] = idx_value + ((u32)reloc->gpu_offset); in r100_packet0_check() [all...]
885 (*cs_reloc)->gpu_offset = in radeon_cs_packet_next_reloc() 887 (*cs_reloc)->gpu_offset |= relocs_chunk->kdata[idx + 0]; in radeon_cs_packet_next_reloc()
488 start = reloc->gpu_offset; in radeon_vce_cs_reloc()
528 lobj->gpu_offset = radeon_bo_gpu_offset(bo); in radeon_bo_list_validate()
581 start = reloc->gpu_offset; in radeon_uvd_cs_reloc()
459 uint64_t gpu_offset; member