/linux/drivers/gpu/drm/nouveau/nvkm/subdev/therm/ |
H A D | fanpwm.c | 44 u32 divs, duty; in nvkm_fanpwm_get() local 47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty); in nvkm_fanpwm_get() 49 divs = max(divs, duty); in nvkm_fanpwm_get() 51 duty = divs - duty; in nvkm_fanpwm_get() 52 return (duty * 100) / divs; in nvkm_fanpwm_get() 63 u32 divs, duty; in nvkm_fanpwm_set() local 74 duty = ((divs * percent) + 99) / 100; in nvkm_fanpwm_set() 76 duty = divs - duty; in nvkm_fanpwm_set() 91 u32 divs, duty; nvkm_fanpwm_create() local [all...] |
H A D | fan.c | 39 int duty; in nvkm_fan_update() local 52 /* check that we're not already at the target duty cycle */ in nvkm_fan_update() 53 duty = fan->get(therm); in nvkm_fan_update() 54 if (duty == target) { in nvkm_fan_update() 60 if (!immediate && duty >= 0) { in nvkm_fan_update() 65 if (duty < target) in nvkm_fan_update() 66 duty = min(duty + 3, target); in nvkm_fan_update() 67 else if (duty > target) in nvkm_fan_update() 68 duty in nvkm_fan_update() [all...] |
H A D | base.c | 44 u16 duty, i; in nvkm_therm_update_trip() local 59 duty = cur_trip->fan_duty; in nvkm_therm_update_trip() 62 duty = 0; in nvkm_therm_update_trip() 66 return duty; in nvkm_therm_update_trip() 74 u16 duty; in nvkm_therm_compute_linear_duty() local 83 duty = (temp - linear_min_temp); in nvkm_therm_compute_linear_duty() 84 duty *= (therm->fan->bios.max_duty - therm->fan->bios.min_duty); in nvkm_therm_compute_linear_duty() 85 duty /= (linear_max_temp - linear_min_temp); in nvkm_therm_compute_linear_duty() 86 duty += therm->fan->bios.min_duty; in nvkm_therm_compute_linear_duty() 87 return duty; in nvkm_therm_compute_linear_duty() 113 int duty = -1; nvkm_therm_update() local [all...] |
H A D | gf119.c | 68 gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in gf119_fan_pwm_get() argument 77 *duty = nvkm_rd32(device, 0x00e118 + (indx * 8)); in gf119_fan_pwm_get() 82 *duty = nvkm_rd32(device, 0x0200dc) & 0x1fff; in gf119_fan_pwm_get() 90 gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in gf119_fan_pwm_set() argument 98 nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000); in gf119_fan_pwm_set() 101 nvkm_wr32(device, 0x0200dc, duty | 0x40000000); in gf119_fan_pwm_set()
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H A D | gm107.c | 34 gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in gm107_fan_pwm_get() argument 38 *duty = nvkm_rd32(device, 0x10eb24) & 0x1fff; in gm107_fan_pwm_get() 43 gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in gm107_fan_pwm_set() argument 47 nvkm_wr32(device, 0x10eb14, duty | 0x80000000); in gm107_fan_pwm_set()
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H A D | fantog.c | 46 int duty; in nvkm_fantog_update() local 53 duty = !nvkm_gpio_get(gpio, 0, DCB_GPIO_FAN, 0xff); in nvkm_fantog_update() 54 nvkm_gpio_set(gpio, 0, DCB_GPIO_FAN, 0xff, duty); in nvkm_fantog_update() 56 if (percent != (duty * 100)) { in nvkm_fantog_update() 58 if (!duty) in nvkm_fantog_update()
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H A D | nv40.c | 121 nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) in nv40_fan_pwm_get() argument 128 *duty = (reg & 0x7fff0000) >> 16; in nv40_fan_pwm_get() 137 *duty = (reg & 0x7fffffff); in nv40_fan_pwm_get() 149 nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) in nv40_fan_pwm_set() argument 154 nvkm_mask(device, 0x0010f0, 0x7fff7fff, (duty << 16) | divs); in nv40_fan_pwm_set() 158 nvkm_mask(device, 0x0015f4, 0x7fffffff, duty); in nv40_fan_pwm_set()
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/linux/drivers/pwm/ |
H A D | pwm-ntxec.c | 16 * - The period and duty cycle can't be changed together in one atomic action. 44 * The time base used in the EC is 8MHz, or 125ns. Period and duty cycle are 57 int period, int duty) in ntxec_pwm_set_raw_period_and_duty_cycle() argument 62 * Changes to the period and duty cycle take effect as soon as the in ntxec_pwm_set_raw_period_and_duty_cycle() 65 * duty cycle is fully written. If, in such a case, the old duty cycle in ntxec_pwm_set_raw_period_and_duty_cycle() 68 * To minimize the time between the changes to period and duty cycle in ntxec_pwm_set_raw_period_and_duty_cycle() 74 { NTXEC_REG_DUTY_HIGH, ntxec_reg8(duty >> 8) }, in ntxec_pwm_set_raw_period_and_duty_cycle() 76 { NTXEC_REG_DUTY_LOW, ntxec_reg8(duty) }, in ntxec_pwm_set_raw_period_and_duty_cycle() 86 unsigned int period, duty; in ntxec_pwm_apply() local [all...] |
H A D | pwm-renesas-tpu.c | 77 u16 duty; member 181 tpu_pwm_write(tpd, TPU_TGRAn, tpd->duty); in tpu_pwm_timer_start() 185 tpd->channel, tpd->duty, tpd->period); in tpu_pwm_timer_start() 227 tpd->duty = 0; in tpu_pwm_request() 251 u32 duty; in tpu_pwm_config() local 303 duty = mul_u64_u64_div_u64(clk_rate, duty_ns, in tpu_pwm_config() 306 duty = 0; in tpu_pwm_config() 309 "rate %u, prescaler %u, period %u, duty %u\n", in tpu_pwm_config() 310 clk_rate, 1 << (2 * prescaler), (u32)period, duty); in tpu_pwm_config() 317 tpd->duty in tpu_pwm_config() [all...] |
H A D | pwm-sunplus.c | 59 u32 dd_freq, duty, mode0, mode1; in sunplus_pwm_apply() local 102 /* cal and set pwm duty */ in sunplus_pwm_apply() 110 duty = SP7021_PWM_DUTY_DD_SEL(pwm->hwpwm) | SP7021_PWM_DUTY_MAX; in sunplus_pwm_apply() 116 duty = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, in sunplus_pwm_apply() 118 duty = SP7021_PWM_DUTY_DD_SEL(pwm->hwpwm) | duty; in sunplus_pwm_apply() 120 writel(duty, priv->base + SP7021_PWM_DUTY(pwm->hwpwm)); in sunplus_pwm_apply() 131 u32 mode0, dd_freq, duty; in sunplus_pwm_get_state() local 139 duty = readl(priv->base + SP7021_PWM_DUTY(pwm->hwpwm)); in sunplus_pwm_get_state() 140 duty in sunplus_pwm_get_state() [all...] |
H A D | pwm-atmel-tcb.c | 37 unsigned duty; /* PWM duty expressed in clk cycles */ member 80 tcbpwm->duty = 0; in atmel_tcb_pwm_request() 95 &tcbpwm->duty); in atmel_tcb_pwm_request() 99 &tcbpwm->duty); in atmel_tcb_pwm_request() 130 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_disable() 137 if (tcbpwm->duty == 0) in atmel_tcb_pwm_disable() 184 * If duty is 0 the timer will be stopped and we have to in atmel_tcb_pwm_enable() 191 if (tcbpwm->duty == 0) in atmel_tcb_pwm_enable() 216 * If duty i in atmel_tcb_pwm_enable() 268 unsigned duty; atmel_tcb_pwm_config() local [all...] |
H A D | pwm-dwc-core.c | 124 u64 duty, period; in dwc_pwm_get_state() local 140 duty = (ld + 1) * dwc->clk_ns; in dwc_pwm_get_state() 142 period += duty; in dwc_pwm_get_state() 144 duty = (ld + 1) * dwc->clk_ns; in dwc_pwm_get_state() 145 period = duty * 2; in dwc_pwm_get_state() 150 state->duty_cycle = duty; in dwc_pwm_get_state()
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H A D | pwm-loongson.c | 121 u64 duty, period; in pwm_loongson_config() local 124 /* duty = duty_ns * ddata->clk_rate / NSEC_PER_SEC */ in pwm_loongson_config() 125 duty = mul_u64_u64_div_u64(duty_ns, ddata->clk_rate, NSEC_PER_SEC); in pwm_loongson_config() 126 if (duty > U32_MAX) in pwm_loongson_config() 127 duty = U32_MAX; in pwm_loongson_config() 134 pwm_loongson_writel(ddata, duty, LOONGSON_PWM_REG_DUTY); in pwm_loongson_config() 169 u32 duty, period, ctrl; in pwm_loongson_get_state() local 172 duty = pwm_loongson_readl(ddata, LOONGSON_PWM_REG_DUTY); in pwm_loongson_get_state() 176 /* duty & period have a max of 2^32, so we can't overflow */ in pwm_loongson_get_state() 177 state->duty_cycle = DIV64_U64_ROUND_UP((u64)duty * NSEC_PER_SE in pwm_loongson_get_state() [all...] |
H A D | pwm-pca9685.c | 134 /* Helper function to set the duty cycle ratio to duty/4096 (e.g. duty=2048 -> 50%) */ 135 static void pca9685_pwm_set_duty(struct pwm_chip *chip, int channel, unsigned int duty) in pca9685_pwm_set_duty() argument 140 if (duty == 0) { in pca9685_pwm_set_duty() 144 } else if (duty >= PCA9685_COUNTER_RANGE) { in pca9685_pwm_set_duty() 158 * configured duty cycle / power output. in pca9685_pwm_set_duty() 164 off = (on + duty) % PCA9685_COUNTER_RANGE; in pca9685_pwm_set_duty() 201 /* Read ON register to calculate duty cycle of staggered output */ in pca9685_pwm_get_duty() 373 unsigned long long duty, prescal in __pca9685_pwm_apply() local 443 unsigned long long duty; pca9685_pwm_get_state() local [all...] |
H A D | pwm-sprd.c | 76 u32 val, duty, prescale; in sprd_pwm_get_state() local 100 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_get_state() 103 * duty_ns = NSEC_PER_SEC * (prescale + 1) * duty / clk_rate in sprd_pwm_get_state() 111 duty = val & SPRD_PWM_DUTY_MSK; in sprd_pwm_get_state() 112 tmp = (prescale + 1) * NSEC_PER_SEC * duty; in sprd_pwm_get_state() 127 u32 prescale, duty; in sprd_pwm_config() local 133 * The duty cycle length is (PRESCALE + 1) * DUTY counter steps. in sprd_pwm_config() 140 duty = duty_ns * SPRD_PWM_MOD_MAX / period_ns; in sprd_pwm_config() 158 sprd_pwm_write(spc, pwm->hwpwm, SPRD_PWM_DUTY, duty); in sprd_pwm_config()
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/volt/ |
H A D | gk104.c | 43 u32 div, duty; in gk104_volt_get() local 46 duty = nvkm_rd32(device, 0x20344); in gk104_volt_get() 48 return bios->base + bios->pwm_range * duty / div; in gk104_volt_get() 56 u32 div, duty; in gk104_volt_set() local 60 duty = DIV_ROUND_UP((uv - bios->base) * div, bios->pwm_range); in gk104_volt_set() 63 nvkm_wr32(device, 0x20344, 0x80000000 | duty); in gk104_volt_set()
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/linux/drivers/gpu/drm/nouveau/ |
H A D | nouveau_led.c | 42 u32 div, duty; in nouveau_led_get_brightness() local 45 duty = nvif_rd32(device, 0x61c884) & 0x00ffffff; in nouveau_led_get_brightness() 48 return duty * LED_FULL / div; in nouveau_led_get_brightness() 62 u32 div, duty; in nouveau_led_set_brightness() local 65 duty = value * div / LED_FULL; in nouveau_led_set_brightness() 73 nvif_wr32(device, 0x61c884, 0xc0000000 | duty); in nouveau_led_set_brightness()
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/linux/Documentation/hwmon/ |
H A D | nzxt-kraken3.rst | 26 Kraken 2023 models additionally expose the speed and duty of an optionally connected 29 Pump and fan duty control mode can be set through pwm[1-2]_enable, where 1 is 32 duty to 100%. 62 2 Curve control mode (applies the temp-PWM duty curve based on coolant temp) 72 pwm1 Pump duty (value between 0-255) 73 pwm1_enable Pump duty control mode (0: disabled, 1: manual, 2: curve) 74 pwm2 Fan duty (value between 0-255) 75 pwm2_enable Fan duty control mode (0: disabled, 1: manual, 2: curve) 76 temp[1-2]_auto_point[1-40]_pwm Temp-PWM duty curves (for pump and fan), related to coolant temp
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H A D | dme1737.rst | 166 attribute that needs to be set to the maximum attainable RPM (fan at 100% duty- 178 manual mode, the fan speed is set by writing the duty-cycle value to the 180 current duty-cycle as set by the fan controller in the chip. All PWM outputs 191 duty-cycles: full, low, and min. Full is internally hard-wired to 255 (100%) 198 pwm[1-3]_auto_point2_pwm full-speed duty-cycle (255, i.e., 100%) 199 pwm[1-3]_auto_point1_pwm low-speed duty-cycle 200 pwm[1-3]_auto_pwm_min min-speed duty-cycle 208 The chip adjusts the output duty-cycle linearly in the range of auto_point1_pwm 211 auto_point1_temp_hyst value, the output duty-cycle is set to the auto_pwm_min 214 duty [all...] |
H A D | vt1211.rst | 181 Each PWM has 4 associated distinct output duty-cycles: full, high, low and 186 thermal thresholds exist that controls both PWMs output duty-cycles. The 196 pwm[1-2]_auto_point4_pwm full speed duty-cycle (hard-wired to 255) 197 pwm[1-2]_auto_point3_pwm high speed duty-cycle 198 pwm[1-2]_auto_point2_pwm low speed duty-cycle 199 pwm[1-2]_auto_point1_pwm off duty-cycle (hard-wired to 0) 212 PWM output duty-cycle based on the input temperature: 218 - full speed duty-cycle full speed duty-cycle 220 - high speed duty [all...] |
H A D | max31790.rst | 23 PWM outputs. The desired fan speeds (or PWM duty cycles) are written 42 pwm[1-6]_enable RW regulator mode, 0=disabled (duty cycle=0%), 1=manual mode, 2=rpm mode 43 pwm[1-6] RW read: current pwm duty cycle, 44 write: target pwm duty cycle (0-255)
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/linux/drivers/clk/meson/ |
H A D | sclk-div.c | 12 * The duty cycle may also be set for the LR clock variant. The duty cycle 126 struct clk_duty *duty) in sclk_div_set_duty_cycle() argument 132 memcpy(&sclk->cached_duty, duty, sizeof(*duty)); in sclk_div_set_duty_cycle() 140 struct clk_duty *duty) in sclk_div_get_duty_cycle() argument 147 duty->num = 1; in sclk_div_get_duty_cycle() 148 duty->den = 2; in sclk_div_get_duty_cycle() 153 duty->num = hi + 1; in sclk_div_get_duty_cycle() 154 duty in sclk_div_get_duty_cycle() [all...] |
/linux/include/trace/events/ |
H A D | clk.h | 233 TP_PROTO(struct clk_core *core, struct clk_duty *duty), 235 TP_ARGS(core, duty), 245 __entry->num = duty->num; 246 __entry->den = duty->den; 255 TP_PROTO(struct clk_core *core, struct clk_duty *duty), 257 TP_ARGS(core, duty) 262 TP_PROTO(struct clk_core *core, struct clk_duty *duty), 264 TP_ARGS(core, duty)
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/linux/drivers/leds/ |
H A D | leds-pwm.c | 46 unsigned long long duty = led_dat->pwmstate.period; in led_pwm_set() local 48 duty *= brightness; in led_pwm_set() 49 do_div(duty, max); in led_pwm_set() 52 duty = led_dat->pwmstate.period - duty; in led_pwm_set() 54 led_dat->pwmstate.duty_cycle = duty; in led_pwm_set()
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
H A D | vega20_thermal.c | 121 uint32_t duty100, duty; in vega20_fan_ctrl_get_fan_speed_pwm() local 126 duty = REG_GET_FIELD(RREG32_SOC15(THM, 0, mmCG_THERMAL_STATUS), in vega20_fan_ctrl_get_fan_speed_pwm() 132 tmp64 = (uint64_t)duty * 255; in vega20_fan_ctrl_get_fan_speed_pwm() 144 uint32_t duty; in vega20_fan_ctrl_set_fan_speed_pwm() local 160 duty = (uint32_t)tmp64; in vega20_fan_ctrl_set_fan_speed_pwm() 164 CG_FDO_CTRL0, FDO_STATIC_DUTY, duty)); in vega20_fan_ctrl_set_fan_speed_pwm()
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