Searched refs:CNFG_CNTL (Results 1 – 6 of 6) sorted by relevance
25 #define CNFG_CNTL 0x00e0 macro
189 #define CNFG_CNTL 0x00DC /* Dword offset 0_37 (CT, ET, VT) */ macro 850 /* CNFG_CNTL register constants */
15 #define CNFG_CNTL 0x00E0 macro 513 /* CNFG_CNTL bit constants */
338 if ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13) in radeon_pm_enable_dynamic_mode() 473 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) || in radeon_pm_enable_dynamic_mode() 475 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) { in radeon_pm_enable_dynamic_mode() 491 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) in radeon_pm_enable_dynamic_mode() 502 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) { in radeon_pm_enable_dynamic_mode()
1514 config = aty_ld_le32(CNFG_CNTL) & ~3; in aty128fb_set_par() 1523 aty_st_le32(CNFG_CNTL, config); in aty128fb_set_par() 1906 chip_rev = (aty_ld_le32(CNFG_CNTL) >> 16) & 0x1F; in aty128_init()
2327 (INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) in radeonfb_pci_register()