/linux/drivers/gpu/drm/i915/ |
H A D | intel_step.c | 37 [2] = { COMMON_STEP(C0) }, 40 [5] = { COMMON_STEP(C0) }, 46 [0xA] = { COMMON_STEP(C0) }, 47 [0xB] = { COMMON_STEP(C0) }, 69 [3] = { COMMON_STEP(C0) }, 81 [4] = { COMMON_STEP(C0) }, 93 [0x8] = { COMMON_STEP(C0) }, 100 [0x8] = { COMMON_STEP(C0) }, 101 [0xC] = { COMMON_STEP(C0) }, 108 [0x8] = { COMMON_STEP(C0) }, [all...] |
H A D | intel_step.h | 33 func(C0) \
|
/linux/crypto/ |
H A D | wp512.c | 50 static const u64 C0[256] = { variable 801 L[0] = C0[(int)(K[0] >> 56) ] ^ in wp512_process_buffer() 811 L[1] = C0[(int)(K[1] >> 56) ] ^ in wp512_process_buffer() 820 L[2] = C0[(int)(K[2] >> 56) ] ^ in wp512_process_buffer() 829 L[3] = C0[(int)(K[3] >> 56) ] ^ in wp512_process_buffer() 838 L[4] = C0[(int)(K[4] >> 56) ] ^ in wp512_process_buffer() 847 L[5] = C0[(int)(K[5] >> 56) ] ^ in wp512_process_buffer() 856 L[6] = C0[(int)(K[6] >> 56) ] ^ in wp512_process_buffer() 865 L[7] = C0[(int)(K[7] >> 56) ] ^ in wp512_process_buffer() 883 L[0] = C0[(in in wp512_process_buffer() [all...] |
/linux/lib/crypto/s390/ |
H A D | chacha-s390.S | 442 #define C0 %v2 macro 514 VLR C0,K2 545 VAF C0,C0,D0 551 VX B0,B0,C0 583 VAF C0,C0,D0 589 VX B0,B0,C0 602 VSLDB C0,C0,C [all...] |
/linux/Documentation/admin-guide/hw-vuln/ |
H A D | cross-thread-rsb.rst | 9 transitions out of C0 state, the other sibling thread could use return target 10 predictions from the sibling thread that transitioned out of C0. 15 transitioning out of C0. This could result in a guest-controlled return target 41 requests to transition out of the C0 state. This can be communicated with the 42 HLT instruction or with an MWAIT instruction that requests non-C0. 43 When the thread re-enters the C0 state, the processor transitions back 44 to 2T mode, assuming the other thread is also still in C0 state. 62 instructions with targeted return locations and then transitioning out of C0 86 attempts to transition out of C0. A VMM can use the KVM_CAP_X86_DISABLE_EXITS
|
/linux/drivers/gpu/drm/xe/tests/ |
H A D | xe_wa_test.c | 62 PLATFORM_CASE(ALDERLAKE_S, C0), 66 PLATFORM_CASE(ALDERLAKE_P, C0), 69 SUBPLATFORM_CASE(DG2, G10, C0),
|
/linux/Documentation/arch/xtensa/ |
H A D | mmu.rst | 40 C0..DF -> C0 -> C0 -> C0 E0..EF -> F0 -> F0
|
/linux/tools/power/cpupower/utils/idle_monitor/ |
H A D | mperf_monitor.c | 30 enum mperf_id { C0 = 0, Cx, AVG_FREQ, MPERF_CSTATE_COUNT }; enumerator 40 .name = "C0", 42 .id = C0, 66 * The max frequency mperf is ticking at (in C0), either retrieved via: 165 if (id != C0 && id != Cx) in mperf_get_count_percent() 302 * On Intel we assume mperf (in C0) is ticking at same in init_maxfreq_mode() 325 * 2) C0 and Cx (any sleep state) time a CPU resided in
|
/linux/Documentation/userspace-api/ioctl/ |
H A D | ioctl-number.rst | 127 'B' C0-FF advanced bbus <mailto:maassen@uni-freiburg.de> 164 'H' C0-F0 net/bluetooth/hci.h conflict! 165 'H' C0-DF net/bluetooth/hidp/hidp.h conflict! 166 'H' C0-DF net/bluetooth/cmtp/cmtp.h conflict! 167 'H' C0-DF net/bluetooth/bnep/bnep.h conflict! 198 'R' C0-DF net/bluetooth/rfcomm.h 207 'T' C0-DF linux/if_tun.h conflict! 211 'U' C0-CF drivers/bluetooth/hci_uart.h 214 'V' C0 linux/ivtvfb.h conflict! 215 'V' C0 linu [all...] |
/linux/Documentation/arch/x86/ |
H A D | zero-page.rst | 28 0C0/004 ALL ext_ramdisk_image ramdisk_image high 32bits 33 1C0/020 ALL efi_info EFI 32 information (struct efi_info)
|
/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-bmc-qcom-dc-scm-v1.dts | 97 /*C0-C7*/ "","","","","","","","", 134 /*C0-C7*/ "","","","","","","","",
|
H A D | aspeed-bmc-vegman-n110.dts | 17 /*C0-C7*/ "","","","","","","","", 54 /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
|
H A D | aspeed-bmc-vegman-sx20.dts | 17 /*C0-C7*/ "","","","","","","","", 54 /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
|
H A D | aspeed-bmc-facebook-greatlakes.dts | 250 /*C0-C7*/ "presence-ocp-nic","","","reset-cause-nic-primary", 289 /*18C0-18C7*/ "","","","","","","","",
|
H A D | aspeed-bmc-vegman-rx20.dts | 45 /*C0-C7*/ "","","","","","","","", 82 /*C0-C7*/ "","","","","CPU2_MISMATCH","","CPU2_MEM_THERM_EVENT","","","","","","","","","",
|
H A D | aspeed-bmc-facebook-harma.dts | 637 /*C0-C7*/ "reset-cause-platrst","","","","", 677 /*18C0-18C7*/ "","","","","","","","", 708 /*C0-C3 line 32-39*/
|
H A D | aspeed-bmc-facebook-santabarbara.dts | 159 /*C0-C7*/ "","","","","","","","", 195 /*18C0-18C7*/ "SPI_BMC_BIOS_ROM_IRQ0_R_N","","","","","","","", 810 /*C0-C3 line 32-39*/
|
/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3128-xpi-3128.dts | 288 /* GPIO0 C0-C7 */ 303 /* GPIO1 C0-C7 */ 318 /* GPIO2 C0-C7 */ 333 /* GPIO3 C0-C7 */
|
/linux/drivers/gpu/drm/xe/ |
H A D | xe_step_types.h | 32 func(C0) \
|
/linux/arch/s390/crypto/ |
H A D | prng.c | 283 static const u8 C0[] __initconst = { in prng_sha512_selftest() local 343 || memcmp(ws.C, C0, sizeof(C0)) != 0) { in prng_sha512_selftest()
|
/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3588-friendlyelec-cm3588-nas.dts | 250 /* GPIO0 C0-C7 */ 266 /* GPIO1 C0-C7 */ 282 /* GPIO2 C0-C7 */ 298 /* GPIO3 C0-C7 */ 314 /* GPIO4 C0-C7 */
|
H A D | rk3588-nanopc-t6.dtsi | 281 /* GPIO0 C0-C7 */ 296 /* GPIO1 C0-C7 */ 311 /* GPIO2 C0-C7 */ 326 /* GPIO3 C0-C7 */ 341 /* GPIO4 C0-C7 */
|
H A D | rk3588s-indiedroid-nova.dts | 204 /* GPIO0 C0-C7 */ 219 /* GPIO1 C0-C7 */ 234 /* GPIO3 C0-C7 */ 249 /* GPIO4 C0-C7 */
|
/linux/Documentation/ABI/testing/ |
H A D | sysfs-devices-system-cpu | 656 enable_c02: Read/write interface to control umwait C0.2 state 657 Read returns C0.2 state status: 658 0: C0.2 is disabled 659 1: C0.2 is enabled 661 Write 'y' or '1' or 'on' to enable C0.2 state. 662 Write 'n' or '0' or 'off' to disable C0.2 state. 667 in TSC-quanta that the CPU can reside in either C0.1 668 or C0.2 state. The time is an unsigned 32-bit number.
|
/linux/Documentation/hid/ |
H A D | hidintro.rst | 284 02 15 80 25 7F 75 08 95 01 81 06 C0 05 01 09 02 289 7F 75 08 95 01 81 06 C0 05 01 09 07 A1 01 85 05 292 C0 05 0C 09 01 A1 01 85 06 15 00 25 01 75 01 95 295 06 C0 05 0C 09 01 A1 01 85 03 09 05 15 00 26 FF 296 00 75 08 95 02 B1 02 C0
|