Home
last modified time | relevance | path

Searched refs:wm_with_clock_ranges (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c401 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges) in dm_pp_notify_wm_clock_changes() argument
412 (void *)wm_with_clock_ranges)) in dm_pp_notify_wm_clock_changes()
469 struct dm_pp_wm_sets_with_clock_ranges_soc15 wm_with_clock_ranges; in pp_rv_set_wm_ranges() local
470 …struct dm_pp_clock_range_for_dmif_wm_set_soc15 *wm_dce_clocks = wm_with_clock_ranges.wm_dmif_clock… in pp_rv_set_wm_ranges()
471 …struct dm_pp_clock_range_for_mcif_wm_set_soc15 *wm_soc_clocks = wm_with_clock_ranges.wm_mcif_clock… in pp_rv_set_wm_ranges()
474 wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets; in pp_rv_set_wm_ranges()
475 wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets; in pp_rv_set_wm_ranges()
477 for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) { in pp_rv_set_wm_ranges()
493 for (i = 0; i < wm_with_clock_ranges.num_wm_mcif_sets; i++) { in pp_rv_set_wm_ranges()
510 &wm_with_clock_ranges); in pp_rv_set_wm_ranges()
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_services.h207 struct dm_pp_wm_sets_with_clock_ranges *wm_with_clock_ranges);
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega12_hwmgr.c2012 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges() local
2017 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); in vega12_set_watermarks_for_clocks_ranges()
H A Dvega20_hwmgr.c2953 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges() local
2958 smu_set_watermarks_for_clocks_ranges(table, wm_with_clock_ranges); in vega20_set_watermarks_for_clocks_ranges()