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Searched refs:wb_gpu_addr (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v6_0.c861 uint64_t wb_gpu_addr; in sdma_v6_0_mqd_init() local
872 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
873 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
874 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
876 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v6_0_mqd_init()
877 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
878 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
H A Dmes_v11_0.c1113 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v11_0_mqd_init() local
1158 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v11_0_mqd_init()
1159 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v11_0_mqd_init()
1161 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
1164 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
1165 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init()
1166 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
H A Dsdma_v5_2.c864 uint64_t wb_gpu_addr; in sdma_v5_2_mqd_init() local
878 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
879 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
880 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
882 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_2_mqd_init()
883 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
884 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
H A Dsdma_v5_0.c964 uint64_t wb_gpu_addr; in sdma_v5_0_mqd_init() local
978 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
979 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
980 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
982 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_0_mqd_init()
983 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
984 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
H A Dmes_v12_0.c1273 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v12_0_mqd_init() local
1316 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v12_0_mqd_init()
1317 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v12_0_mqd_init()
1319 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
1322 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
1323 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_0_mqd_init()
1324 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
H A Dgfx_v12_0.c2973 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v12_0_gfx_mqd_init() local
3014 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
3015 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
3017 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
3020 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
3021 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
3022 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
3116 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v12_0_compute_mqd_init() local
3194 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
3195 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_compute_mqd_init()
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H A Dgfx_v11_0.c4103 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v11_0_gfx_mqd_init() local
4141 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4142 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4144 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4147 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4148 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4149 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4245 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v11_0_compute_mqd_init() local
4324 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
4325 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_compute_mqd_init()
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H A Dgfx_v9_4_2.c351 u32 compute_dim_x, u64 wb_gpu_addr, u32 pattern, in gfx_v9_4_2_run_shader() argument
399 ib->ptr[ib->length_dw++] = lower_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
400 ib->ptr[ib->length_dw++] = upper_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
H A Dgfx_v10_0.c6767 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v10_0_gfx_mqd_init() local
6805 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6806 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6808 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6811 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6812 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6813 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6911 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v10_0_compute_mqd_init() local
6989 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
6990 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_compute_mqd_init()
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/linux/drivers/gpu/drm/radeon/
H A Dcik.c4516 u64 wb_gpu_addr; in cik_cp_compute_resume() local
4677 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; in cik_cp_compute_resume()
4679 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; in cik_cp_compute_resume()
4680 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4681 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()
4688 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; in cik_cp_compute_resume()
4690 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; in cik_cp_compute_resume()
4691 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4693 upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()