| /linux/sound/pci/ |
| H A D | ad1889.c | 90 struct ad1889_register_state wave; member 190 chip->wave.reg = reg; in ad1889_channel_reset() 358 chip->wave.size = size; in snd_ad1889_playback_prepare() 359 chip->wave.reg = reg; in snd_ad1889_playback_prepare() 360 chip->wave.addr = rt->dma_addr; in snd_ad1889_playback_prepare() 362 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg); in snd_ad1889_playback_prepare() 368 ad1889_load_wave_buffer_address(chip, chip->wave.addr); in snd_ad1889_playback_prepare() 377 chip->wave.addr, count, size, reg, rt->rate); in snd_ad1889_playback_prepare() 456 chip->wave.reg = wsmc; in snd_ad1889_playback_trigger() 512 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN))) in snd_ad1889_playback_pointer() [all …]
|
| /linux/sound/pci/emu10k1/ |
| H A D | emu10k1.c | 76 struct snd_seq_device *wave = NULL; in snd_card_emu10k1_probe() local 151 sizeof(struct snd_emu10k1_synth_arg), &wave) < 0 || in snd_card_emu10k1_probe() 152 wave == NULL) { in snd_card_emu10k1_probe() 157 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in snd_card_emu10k1_probe() 158 strscpy(wave->name, "Emu-10k1 Synth"); in snd_card_emu10k1_probe()
|
| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_4_2.c | 422 uint32_t se, cu, simd, wave; in gfx_v9_4_2_log_wave_assignment() local 439 for (wave = 0; wave < WAVE_ID_MAX; wave++) { in gfx_v9_4_2_log_wave_assignment() 456 uint32_t se, cu, simd, wave; in gfx_v9_4_2_wait_for_waves_assigned() local 468 for (wave = 0; wave < WAVE_ID_MAX; wave++) { in gfx_v9_4_2_wait_for_waves_assigned() 469 if (((1 << wave) & mask) && in gfx_v9_4_2_wait_for_waves_assigned() 1816 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t ad… in wave_read_ind() argument 1819 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 1830 uint32_t i, simd, wave; in gfx_v9_4_2_log_cu_timeout_status() local 1842 wave = i % cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status() 1844 wave_status = wave_read_ind(adev, simd, wave, ixSQ_WAVE_STATUS); in gfx_v9_4_2_log_cu_timeout_status() [all …]
|
| H A D | gfx_v12_0.c | 816 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) in wave_read_ind() argument 819 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 824 static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, in wave_read_regs() argument 829 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 839 uint32_t simd, uint32_t wave, in gfx_v12_0_read_wave_data() argument 849 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v12_0_read_wave_data() 850 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v12_0_read_wave_data() 851 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v12_0_read_wave_data() 852 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v12_0_read_wave_data() 853 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v12_0_read_wave_data() [all …]
|
| H A D | amdgpu_debugfs.c | 430 adev->gfx.funcs->read_wave_data(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, data, &x); in amdgpu_debugfs_gprwave_read() 435 …adev->gfx.funcs->read_wave_vgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, rd->id.gpr.thread,… in amdgpu_debugfs_gprwave_read() 438 …adev->gfx.funcs->read_wave_sgprs(adev, rd->id.xcc_id, rd->id.simd, rd->id.wave, *pos, size>>2, dat… in amdgpu_debugfs_gprwave_read() 1049 uint32_t offset, se, sh, cu, wave, simd, data[32]; in amdgpu_debugfs_wave_read() local 1059 wave = (*pos & GENMASK_ULL(36, 31)) >> 31; in amdgpu_debugfs_wave_read() 1080 adev->gfx.funcs->read_wave_data(adev, 0, simd, wave, data, &x); in amdgpu_debugfs_wave_read() 1140 uint32_t offset, se, sh, cu, wave, simd, thread, bank, *data; in amdgpu_debugfs_gpr_read() local 1150 wave = (*pos & GENMASK_ULL(43, 36)) >> 36; in amdgpu_debugfs_gpr_read() 1173 adev->gfx.funcs->read_wave_vgprs(adev, 0, simd, wave, thread, offset, size>>2, data); in amdgpu_debugfs_gpr_read() 1176 adev->gfx.funcs->read_wave_sgprs(adev, 0, simd, wave, offset, size>>2, data); in amdgpu_debugfs_gpr_read()
|
| H A D | amdgpu_umr.h | 50 u32 gpr_or_wave, se, sh, cu, wave, simd, xcc_id; member
|
| H A D | gfx_v11_0.c | 977 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) in wave_read_ind() argument 980 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 985 static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, in wave_read_regs() argument 990 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 998 …data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int… in gfx_v11_0_read_wave_data() argument 1007 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v11_0_read_wave_data() 1008 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v11_0_read_wave_data() 1009 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v11_0_read_wave_data() 1010 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v11_0_read_wave_data() 1011 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v11_0_read_wave_data() [all …]
|
| H A D | gfx_v10_0.c | 4477 static uint32_t wave_read_ind(struct amdgpu_device *adev, uint32_t wave, uint32_t address) in wave_read_ind() argument 4480 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_ind() 4485 static void wave_read_regs(struct amdgpu_device *adev, uint32_t wave, in wave_read_regs() argument 4490 (wave << SQ_IND_INDEX__WAVE_ID__SHIFT) | in wave_read_regs() 4498 …data(struct amdgpu_device *adev, uint32_t xcc_id, uint32_t simd, uint32_t wave, uint32_t *dst, int… in gfx_v10_0_read_wave_data() argument 4508 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_STATUS); in gfx_v10_0_read_wave_data() 4509 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_LO); in gfx_v10_0_read_wave_data() 4510 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_PC_HI); in gfx_v10_0_read_wave_data() 4511 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_LO); in gfx_v10_0_read_wave_data() 4512 dst[(*no_fields)++] = wave_read_ind(adev, wave, ixSQ_WAVE_EXEC_HI); in gfx_v10_0_read_wave_data() [all …]
|
| /linux/sound/pci/au88x0/ |
| H A D | au88x0.c | 266 sizeof(snd_vortex_synth_arg_t), &wave) < 0 in __snd_vortex_probe() 267 || wave == NULL) { in __snd_vortex_probe() 272 arg = SNDRV_SEQ_DEVICE_ARGPTR(wave); in __snd_vortex_probe() 273 strscpy(wave->name, "Aureal Synth"); in __snd_vortex_probe()
|
| /linux/Documentation/devicetree/bindings/clock/ti/davinci/ |
| H A D | pll.txt | 18 - ti,clkmode-square-wave: Indicates that the board is supplying a square 19 wave input on the OSCIN pin instead of using a crystal oscillator. 61 ti,clkmode-square-wave;
|
| /linux/drivers/gpu/ipu-v3/ |
| H A D | ipu-dc.c | 120 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument 129 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl() 132 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
|
| /linux/Documentation/gpu/amdgpu/ |
| H A D | debugfs.rst | 193 Used to query GFX/compute wave information from the hardware. Used by tools 194 like UMR to query GFX/compute wave information.
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | nvidia,tegra124-dfll.txt | 56 - nvidia,pwm-period-nanoseconds: period of PWM square wave in nanoseconds.
|
| /linux/Documentation/virt/kvm/x86/ |
| H A D | timekeeping.rst | 103 This generates a high / low square wave. The count 112 which generates sine-like tones by low-pass filtering the square wave output. 253 bit 3 = Square wave interrupt enable
|
| /linux/Documentation/driver-api/media/drivers/ |
| H A D | vidtv.rst | 34 Elementary Stream, which in turn contains a SMPTE 302m encoded sine-wave.
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-counter | 123 square wave mode:
|