Home
last modified time | relevance | path

Searched refs:vld (Results 1 – 14 of 14) sorted by relevance

/linux/arch/loongarch/kernel/
H A Dfpu.S239 EX vld $vr0, \base, (0 * LSX_REG_WIDTH)
240 EX vld $vr1, \base, (1 * LSX_REG_WIDTH)
241 EX vld $vr2, \base, (2 * LSX_REG_WIDTH)
242 EX vld $vr3, \base, (3 * LSX_REG_WIDTH)
243 EX vld $vr4, \base, (4 * LSX_REG_WIDTH)
244 EX vld $vr5, \base, (5 * LSX_REG_WIDTH)
245 EX vld $vr6, \base, (6 * LSX_REG_WIDTH)
246 EX vld $vr7, \base, (7 * LSX_REG_WIDTH)
247 EX vld $vr8, \base, (8 * LSX_REG_WIDTH)
248 EX vld $vr9, \base, (9 * LSX_REG_WIDTH)
[all …]
/linux/arch/loongarch/include/asm/
H A Dasmmacro.h305 vld $vr0, \tmp, THREAD_FPR0 - THREAD_FPR0
306 vld $vr1, \tmp, THREAD_FPR1 - THREAD_FPR0
307 vld $vr2, \tmp, THREAD_FPR2 - THREAD_FPR0
308 vld $vr3, \tmp, THREAD_FPR3 - THREAD_FPR0
309 vld $vr4, \tmp, THREAD_FPR4 - THREAD_FPR0
310 vld $vr5, \tmp, THREAD_FPR5 - THREAD_FPR0
311 vld $vr6, \tmp, THREAD_FPR6 - THREAD_FPR0
312 vld $vr7, \tmp, THREAD_FPR7 - THREAD_FPR0
313 vld $vr8, \tmp, THREAD_FPR8 - THREAD_FPR0
314 vld $vr9, \tmp, THREAD_FPR9 - THREAD_FPR0
[all …]
/linux/drivers/infiniband/hw/hfi1/
H A Dpio.c50 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
51 if (!dd->vld[i].mtu) in pio_send_control()
1770 return dd->vld[0].sc; in pio_select_send_context_vl()
1777 rval = !rval ? dd->vld[0].sc : rval; in pio_select_send_context_vl()
1829 dd->vld[i].mtu, in set_threshold()
1965 dd->vld[15].sc = sc_alloc(dd, SC_VL15, in init_pervl_scs()
1967 if (!dd->vld[15].sc) in init_pervl_scs()
1970 hfi1_init_ctxt(dd->vld[15].sc); in init_pervl_scs()
1971 dd->vld[15].mtu = enum_to_mtu(OPA_MTU_2048); in init_pervl_scs()
1979 dd->kernel_send_context[0] = dd->vld[15].sc; in init_pervl_scs()
[all …]
H A Dqp.c290 if (wqe->length > dd->vld[15].mtu) in hfi1_setup_wqe()
571 return dd->vld[15].sc; in qp_to_send_context()
817 mtu = min_t(u32, mtu, dd->vld[vl].mtu); in mtu_from_qp()
H A Dmad.c783 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_get_opa_portinfo()
848 mtu = mtu_to_enum(dd->vld[i].mtu, HFI1_DEFAULT_ACTIVE_MTU); in __subn_get_opa_portinfo()
855 mtu = mtu_to_enum(dd->vld[15].mtu, 2048); in __subn_get_opa_portinfo()
1485 ppd->vls_supported > ARRAY_SIZE(dd->vld)) { in __subn_set_opa_portinfo()
1503 if (dd->vld[i].mtu != mtu) { in __subn_set_opa_portinfo()
1506 i, dd->vld[i].mtu, mtu); in __subn_set_opa_portinfo()
1507 dd->vld[i].mtu = mtu; in __subn_set_opa_portinfo()
1517 if (dd->vld[15].mtu != mtu) { in __subn_set_opa_portinfo()
1520 dd->vld[15].mtu, mtu); in __subn_set_opa_portinfo()
1521 dd->vld[15].mtu = mtu; in __subn_set_opa_portinfo()
H A Dchip.c5798 if (dd->vld[15].sc == sc) in sc_to_vl()
5801 if (dd->vld[i].sc == sc) in sc_to_vl()
10121 u32 maxvlmtu = dd->vld[15].mtu; in set_send_length()
10122 u64 len1 = 0, len2 = (((dd->vld[15].mtu + max_hb) >> 2) in set_send_length()
10129 if (dd->vld[i].mtu > maxvlmtu) in set_send_length()
10130 maxvlmtu = dd->vld[i].mtu; in set_send_length()
10132 len1 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10136 len2 |= (((dd->vld[i].mtu + max_hb) >> 2) in set_send_length()
10145 thres = min(sc_percent_to_threshold(dd->vld[i].sc, 50), in set_send_length()
10146 sc_mtu_to_threshold(dd->vld[i].sc, in set_send_length()
[all …]
H A Dsysfs.c349 return sysfs_emit(buf, "%u\n", dd->vld[vlattr->vl].mtu); in vl2mtu_attr_show()
H A Ddriver.c1245 if (ppd->ibmtu < dd->vld[i].mtu) in set_mtu()
1246 ppd->ibmtu = dd->vld[i].mtu; in set_mtu()
H A Dhfi.h1041 struct per_vl_data vld[PER_VL_SEND_CONTEXTS]; member
H A Dverbs.c1529 ah->log_pmtu = ilog2(dd->vld[ah->vl].mtu); in hfi1_notify_new_ah()
/linux/include/linux/mtd/
H A Dnand-qpic-common.h311 __le32 vld; member
433 u32 cmd1, vld; member
/linux/drivers/perf/
H A Dxgene_pmu.c524 XGENE_PMU_EVENT_ATTR(pd-entry-vld, 0x07),
525 XGENE_PMU_EVENT_ATTR(sref-entry-vld, 0x08),
535 XGENE_PMU_EVENT_ATTR(hprd-lprd-wr-req-vld, 0x12),
536 XGENE_PMU_EVENT_ATTR(lprd-req-vld, 0x13),
537 XGENE_PMU_EVENT_ATTR(hprd-req-vld, 0x14),
538 XGENE_PMU_EVENT_ATTR(hprd-lprd-req-vld, 0x15),
539 XGENE_PMU_EVENT_ATTR(wr-req-vld, 0x16),
540 XGENE_PMU_EVENT_ATTR(partial-wr-req-vld, 0x17),
/linux/drivers/mtd/nand/raw/
H A Dqcom_nandc.c1907 nandc->regs->vld = cpu_to_le32((nandc->vld & ~READ_START_VLD)); in qcom_param_page_type_exec()
1916 nandc->regs->orig_vld = cpu_to_le32(nandc->vld); in qcom_param_page_type_exec()
1929 qcom_write_reg_dma(nandc, &nandc->regs->vld, NAND_DEV_CMD_VLD, 1, 0); in qcom_param_page_type_exec()
2068 nandc->vld = NAND_DEV_CMD_VLD_VAL; in qcom_nandc_setup()
/linux/arch/loongarch/
H A DKconfig296 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)