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Searched refs:vdsc_cfg (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c57 intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, int buf, in intel_vdsc_set_min_max_qp() argument
60 int bpc = vdsc_cfg->bits_per_component; in intel_vdsc_set_min_max_qp()
63 vdsc_cfg->rc_range_params[buf].range_min_qp = in intel_vdsc_set_min_max_qp()
64 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
65 vdsc_cfg->rc_range_params[buf].range_max_qp = in intel_vdsc_set_min_max_qp()
66 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
86 calculate_rc_params(struct drm_dsc_config *vdsc_cfg) in calculate_rc_params() argument
88 int bpp = fxp_q4_to_int(vdsc_cfg->bits_per_pixel); in calculate_rc_params()
89 int bpc = vdsc_cfg->bits_per_component; in calculate_rc_params()
95 if (vdsc_cfg->slice_height >= 8) in calculate_rc_params()
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H A Dicl_dsi.c1615 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in gen11_dsi_dsc_compute_config() local
1634 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in gen11_dsi_dsc_compute_config()
1636 vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay; in gen11_dsi_dsc_compute_config()
1643 drm_WARN_ON(display->drm, vdsc_cfg->vbr_enable); in gen11_dsi_dsc_compute_config()
1644 drm_WARN_ON(display->drm, vdsc_cfg->simple_422); in gen11_dsi_dsc_compute_config()
1646 vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
1647 drm_WARN_ON(display->drm, vdsc_cfg->slice_height < 8); in gen11_dsi_dsc_compute_config()
1649 vdsc_cfg->pic_height % vdsc_cfg->slice_height); in gen11_dsi_dsc_compute_config()
1651 ret = drm_dsc_compute_rc_parameters(vdsc_cfg); in gen11_dsi_dsc_compute_config()
H A Dintel_dp.c1904 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dp_dsc_compute_params() local
1913 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in intel_dp_dsc_compute_params()
1914 vdsc_cfg->pic_height = crtc_state->hw.adjusted_mode.crtc_vdisplay; in intel_dp_dsc_compute_params()
1916 vdsc_cfg->slice_height = intel_dp_get_slice_height(vdsc_cfg->pic_height); in intel_dp_dsc_compute_params()
1922 vdsc_cfg->dsc_version_major = in intel_dp_dsc_compute_params()
1925 vdsc_cfg->dsc_version_minor = in intel_dp_dsc_compute_params()
1928 if (vdsc_cfg->convert_rgb) in intel_dp_dsc_compute_params()
1929 vdsc_cfg->convert_rgb = in intel_dp_dsc_compute_params()
1933 vdsc_cfg->line_buf_depth = min(INTEL_DP_DSC_MAX_LINE_BUF_DEPTH, in intel_dp_dsc_compute_params()
1935 if (!vdsc_cfg->line_buf_depth) { in intel_dp_dsc_compute_params()
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H A Dintel_bios.c3551 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in fill_dsc() local
3554 vdsc_cfg->dsc_version_major = dsc->version_major; in fill_dsc()
3555 vdsc_cfg->dsc_version_minor = dsc->version_minor; in fill_dsc()
3602 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size, in fill_dsc()
3606 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth); in fill_dsc()
3608 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable; in fill_dsc()
3610 vdsc_cfg->slice_height = dsc->slice_height; in fill_dsc()
H A Dintel_psr.c1303 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in psr2_granularity_check() local
1346 vdsc_cfg->slice_height % y_granularity) in psr2_granularity_check()
2702 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_psr2_sel_fetch_pipe_alignment() local
2709 y_alignment = vdsc_cfg->slice_height; in intel_psr2_sel_fetch_pipe_alignment()
/linux/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c282 void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg) in drm_dsc_set_const_params() argument
284 if (!vdsc_cfg->rc_model_size) in drm_dsc_set_const_params()
285 vdsc_cfg->rc_model_size = DSC_RC_MODEL_SIZE_CONST; in drm_dsc_set_const_params()
286 vdsc_cfg->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST; in drm_dsc_set_const_params()
287 vdsc_cfg->rc_tgt_offset_high = DSC_RC_TGT_OFFSET_HI_CONST; in drm_dsc_set_const_params()
288 vdsc_cfg->rc_tgt_offset_low = DSC_RC_TGT_OFFSET_LO_CONST; in drm_dsc_set_const_params()
290 if (vdsc_cfg->bits_per_component <= 10) in drm_dsc_set_const_params()
291 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_8_10_BPC; in drm_dsc_set_const_params()
293 vdsc_cfg->mux_word_size = DSC_MUX_WORD_SIZE_12_BPC; in drm_dsc_set_const_params()
309 void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg) in drm_dsc_set_rc_buf_thresh() argument
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/linux/include/drm/display/
H A Ddrm_dsc_helper.h26 void drm_dsc_set_const_params(struct drm_dsc_config *vdsc_cfg);
27 void drm_dsc_set_rc_buf_thresh(struct drm_dsc_config *vdsc_cfg);
28 int drm_dsc_setup_rc_params(struct drm_dsc_config *vdsc_cfg, enum drm_dsc_params_type type);
29 int drm_dsc_compute_rc_parameters(struct drm_dsc_config *vdsc_cfg);
32 u32 drm_dsc_get_bpp_int(const struct drm_dsc_config *vdsc_cfg);