| /linux/drivers/gpu/drm/amd/include/ |
| H A D | v11_structs.h | 28 uint32_t shadow_base_lo; // offset: 0 (0x0) 29 uint32_t shadow_base_hi; // offset: 1 (0x1) 30 uint32_t gds_bkup_base_lo; // offset: 2 (0x2) 31 uint32_t gds_bkup_base_hi; // offset: 3 (0x3) 32 uint32_t fw_work_area_base_lo; // offset: 4 (0x4) 33 uint32_t fw_work_area_base_hi; // offset: 5 (0x5) 34 uint32_t shadow_initialized; // offset: 6 (0x6) 35 uint32_t ib_vmid; // offset: 7 (0x7) 36 uint32_t reserved_8; // offset: 8 (0x8) 37 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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| H A D | v10_structs.h | 28 uint32_t reserved_0; // offset: 0 (0x0) 29 uint32_t reserved_1; // offset: 1 (0x1) 30 uint32_t reserved_2; // offset: 2 (0x2) 31 uint32_t reserved_3; // offset: 3 (0x3) 32 uint32_t reserved_4; // offset: 4 (0x4) 33 uint32_t reserved_5; // offset: 5 (0x5) 34 uint32_t reserved_6; // offset: 6 (0x6) 35 uint32_t reserved_7; // offset: 7 (0x7) 36 uint32_t reserved_8; // offset: 8 (0x8) 37 uint32_t reserved_9; // offset: 9 (0x9) [all …]
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| H A D | v9_structs.h | 28 uint32_t sdmax_rlcx_rb_cntl; 29 uint32_t sdmax_rlcx_rb_base; 30 uint32_t sdmax_rlcx_rb_base_hi; 31 uint32_t sdmax_rlcx_rb_rptr; 32 uint32_t sdmax_rlcx_rb_rptr_hi; 33 uint32_t sdmax_rlcx_rb_wptr; 34 uint32_t sdmax_rlcx_rb_wptr_hi; 35 uint32_t sdmax_rlcx_rb_wptr_poll_cntl; 36 uint32_t sdmax_rlcx_rb_rptr_addr_hi; 37 uint32_t sdmax_rlcx_rb_rptr_addr_lo; [all …]
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| H A D | vi_structs.h | 28 uint32_t sdmax_rlcx_rb_cntl; 29 uint32_t sdmax_rlcx_rb_base; 30 uint32_t sdmax_rlcx_rb_base_hi; 31 uint32_t sdmax_rlcx_rb_rptr; 32 uint32_t sdmax_rlcx_rb_wptr; 33 uint32_t sdmax_rlcx_rb_wptr_poll_cntl; 34 uint32_t sdmax_rlcx_rb_wptr_poll_addr_hi; 35 uint32_t sdmax_rlcx_rb_wptr_poll_addr_lo; 36 uint32_t sdmax_rlcx_rb_rptr_addr_hi; 37 uint32_t sdmax_rlcx_rb_rptr_addr_lo; [all …]
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| H A D | cik_structs.h | 28 uint32_t header; 29 uint32_t compute_dispatch_initiator; 30 uint32_t compute_dim_x; 31 uint32_t compute_dim_y; 32 uint32_t compute_dim_z; 33 uint32_t compute_start_x; 34 uint32_t compute_start_y; 35 uint32_t compute_start_z; 36 uint32_t compute_num_thread_x; 37 uint32_t compute_num_thread_y; [all …]
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| H A D | discovery.h | 59 uint32_t binary_signature; /* 0x7, 0x14, 0x21, 0x28 */ 76 uint32_t signature; /* Table Signature */ 79 uint32_t id; /* Table ID */ 107 uint32_t base_address[]; /* variable number of Addresses */ 125 uint32_t base_address[]; /* Base Address list. Corresponds to the num_base_address field*/ 143 …DECLARE_FLEX_ARRAY(uint32_t, base_address); /* 32-bit Base Address list. Corresponds to the num_ba… 170 uint32_t table_id; /* table ID */ 173 uint32_t size; /* size of the entire header+data in bytes */ 179 uint32_t gc_num_se; 180 uint32_t gc_num_wgp0_per_sa; [all …]
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| H A D | mes_v11_api_def.h | 73 uint32_t type : 4; /* 0 - Invalid; 1 - Scheduling; 2 - TBD */ 74 uint32_t opcode : 8; 75 uint32_t dwsize : 8; /* including header */ 76 uint32_t reserved : 12; 79 uint32_t u32All; 174 uint32_t first_free_entry_index; 175 uint32_t wraparound_count; 182 uint32_t operation_type; /* operation_type is of MES_LOG_OPERATION type */ 183 uint32_t reserved_operation_type_bits; 206 uint32_t vmid_mask_mmhub; [all …]
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| H A D | kgd_kfd_interface.h | 51 uint32_t vmid; 52 uint32_t mc_id; 53 uint32_t status; 64 uint32_t vram_width; 65 uint32_t mem_clk_max; 111 uint32_t num_pipe_per_mec; 114 uint32_t num_queue_per_pipe; 123 uint32_t *sdma_doorbell_idx; 128 uint32_t non_cp_doorbells_start; 129 uint32_t non_cp_doorbells_end; [all …]
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| /linux/drivers/accel/rocket/ |
| H A D | rocket_registers.h | 23 static inline uint32_t PC_VERSION_VERSION(uint32_t val) in PC_VERSION_VERSION() 31 static inline uint32_t PC_VERSION_NUM_VERSION_NUM(uint32_t val) in PC_VERSION_NUM_VERSION_NUM() 39 static inline uint32_t PC_OPERATION_ENABLE_RESERVED_0(uint32_t val) in PC_OPERATION_ENABLE_RESERVED_0() 45 static inline uint32_t PC_OPERATION_ENABLE_OP_EN(uint32_t val) in PC_OPERATION_ENABLE_OP_EN() 53 static inline uint32_t PC_BASE_ADDRESS_PC_SOURCE_ADDR(uint32_t val) in PC_BASE_ADDRESS_PC_SOURCE_ADDR() 59 static inline uint32_t PC_BASE_ADDRESS_RESERVED_0(uint32_t val) in PC_BASE_ADDRESS_RESERVED_0() 65 static inline uint32_t PC_BASE_ADDRESS_PC_SEL(uint32_t val) in PC_BASE_ADDRESS_PC_SEL() 73 static inline uint32_t PC_REGISTER_AMOUNTS_RESERVED_0(uint32_t val) in PC_REGISTER_AMOUNTS_RESERVED_0() 79 static inline uint32_t PC_REGISTER_AMOUNTS_PC_DATA_AMOUNT(uint32_t val) in PC_REGISTER_AMOUNTS_PC_DATA_AMOUNT() 87 static inline uint32_t PC_INTERRUPT_MASK_RESERVED_0(uint32_t val) in PC_INTERRUPT_MASK_RESERVED_0() [all …]
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| /linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pciercx-defs.h | 55 uint32_t u32; 57 __BITFIELD_FIELD(uint32_t dpe:1, 58 __BITFIELD_FIELD(uint32_t sse:1, 59 __BITFIELD_FIELD(uint32_t rma:1, 60 __BITFIELD_FIELD(uint32_t rta:1, 61 __BITFIELD_FIELD(uint32_t sta:1, 62 __BITFIELD_FIELD(uint32_t devt:2, 63 __BITFIELD_FIELD(uint32_t mdpe:1, 64 __BITFIELD_FIELD(uint32_t fbb:1, 65 __BITFIELD_FIELD(uint32_t reserved_22_22:1, [all …]
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| H A D | cvmx-pci-defs.h | 118 uint32_t u32; 121 uint32_t reserved_18_31:14; 122 uint32_t addr_idx:14; 123 uint32_t ca:1; 124 uint32_t end_swp:2; 125 uint32_t addr_v:1; 127 uint32_t addr_v:1; 128 uint32_t end_swp:2; 129 uint32_t ca:1; 130 uint32_t addr_idx:14; [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/ |
| H A D | dml_top_dchub_registers.h | 12 uint32_t refcyc_h_blank_end; 13 uint32_t dlg_vblank_end; 14 uint32_t min_dst_y_next_start; 15 uint32_t refcyc_per_htotal; 16 uint32_t refcyc_x_after_scaler; 17 uint32_t dst_y_after_scaler; 18 uint32_t dst_y_prefetch; 19 uint32_t dst_y_per_vm_vblank; 20 uint32_t dst_y_per_row_vblank; 21 uint32_t dst_y_per_vm_flip; [all …]
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| H A D | kfd_pm4_headers_ai.h | 32 uint32_t reserved1 : 8; /* < reserved */ 33 uint32_t opcode : 8; /* < IT opcode */ 34 uint32_t count : 14;/* < number of DWORDs - 1 in the 37 uint32_t type : 2; /* < packet identifier. 41 uint32_t u32All; 59 uint32_t ordinal1; 64 uint32_t vmid_mask:16; 65 uint32_t unmap_latency:8; 66 uint32_t reserved1:4; 67 uint32_t enb_xnack_retry_disable_check:1; [all …]
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| H A D | kfd_pm4_headers_vi.h | 32 uint32_t reserved1 : 8; /* < reserved */ 33 uint32_t opcode : 8; /* < IT opcode */ 34 uint32_t count : 14;/* < Number of DWORDS - 1 in the 37 uint32_t type : 2; /* < packet identifier 41 uint32_t u32All; 59 uint32_t ordinal1; 64 uint32_t vmid_mask:16; 65 uint32_t unmap_latency:8; 66 uint32_t reserved1:5; 69 uint32_t ordinal2; [all …]
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| /linux/drivers/scsi/arcmsr/ |
| H A D | arcmsr.h | 104 #define dma_addr_hi32(addr) (uint32_t) ((addr>>16)>>16) 105 #define dma_addr_lo32(addr) (uint32_t) (addr & 0xffffffff) 113 uint32_t HeaderLength; 115 uint32_t Timeout; 116 uint32_t ControlCode; 117 uint32_t ReturnCode; 118 uint32_t Length; 196 uint32_t data_len; 206 uint32_t signature; /*0, 00-03*/ 207 uint32_t request_len; /*1, 04-07*/ [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/sspl/ |
| H A D | dc_spl_types.h | 14 uint32_t width; 15 uint32_t height; 38 uint32_t v_taps; 39 uint32_t h_taps; 40 uint32_t v_taps_c; 41 uint32_t h_taps_c; 171 uint32_t width; 172 uint32_t height; 186 uint32_t offset_rgb_y; 187 uint32_t offset_rgb_cbcr; [all …]
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| /linux/drivers/gpu/drm/amd/display/include/ |
| H A D | grph_object_ctrl_defs.h | 67 uint32_t enum_id:16; /* 1 based enum */ 73 uint32_t clk_mask_register_index; 74 uint32_t clk_en_register_index; 75 uint32_t clk_y_register_index; 76 uint32_t clk_a_register_index; 77 uint32_t data_mask_register_index; 78 uint32_t data_en_register_index; 79 uint32_t data_y_register_index; 80 uint32_t data_a_register_index; 82 uint32_t clk_mask_shift; [all …]
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| /linux/sound/soc/qcom/qdsp6/ |
| H A D | audioreach.h | 73 uint32_t property_flag; 77 uint32_t shm_addr_lsw; 78 uint32_t shm_addr_msw; 79 uint32_t mem_size_bytes; 83 uint32_t mem_map_handle; 87 uint32_t mem_map_handle; 96 uint32_t num_modules_list; 102 uint32_t num_modules_prop_cfg; 106 uint32_t instance_id; 107 uint32_t num_prop [all...] |
| /linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/ |
| H A D | smu_v13_0_6_pmfw.h | 134 uint32_t AccumulationCounter; 137 uint32_t MaxSocketTemperature; 138 uint32_t MaxVrTemperature; 139 uint32_t MaxHbmTemperature; 145 uint32_t SocketPowerLimit; 146 uint32_t MaxSocketPowerLimit; 147 uint32_t SocketPower; 158 uint32_t CclkFrequencyLimit; 159 uint32_t GfxclkFrequencyLimit; 160 uint32_t FclkFrequency; [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | timing_generator.h | 60 uint32_t vertical_total_min; 61 uint32_t vertical_total_max; 62 uint32_t vertical_total_mid; 63 uint32_t vertical_total_mid_frame_num; 68 uint32_t vertical_total_min; 69 uint32_t vertical_total_max; 70 uint32_t vertical_blank_start; 157 uint32_t v_blank_start; 158 uint32_t v_blank_end; 159 uint32_t v_sync_a_pol; [all …]
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| H A D | dccg.h | 75 uint32_t dc_mem_global_pwr_req_cntl; 76 uint32_t dccg_audio_dtbclk_dto_modulo; 77 uint32_t dccg_audio_dtbclk_dto_phase; 78 uint32_t dccg_audio_dto_source; 79 uint32_t dccg_audio_dto0_module; 80 uint32_t dccg_audio_dto0_phase; 81 uint32_t dccg_audio_dto1_module; 82 uint32_t dccg_audio_dto1_phase; 83 uint32_t dccg_cac_status; 84 uint32_t dccg_cac_status2; [all …]
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| /linux/drivers/scsi/lpfc/ |
| H A D | lpfc_hw.h | 80 uint32_t Revision:8; 81 uint32_t InId:24; 83 uint32_t word; 92 uint32_t word; 155 uint32_t PortId; /* For RNN_ID requests */ 164 uint32_t port_id; 167 uint32_t PortId; 177 uint32_t PortId; 183 uint32_t PortId; 186 uint32_t fc4_types[8]; [all …]
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| /linux/tools/firewire/ |
| H A D | nosy-dump.h | 15 uint32_t timestamp; 18 uint32_t zero:24; 19 uint32_t phy_id:6; 20 uint32_t identifier:2; 24 uint32_t zero:16; 25 uint32_t gap_count:6; 26 uint32_t set_gap_count:1; 27 uint32_t set_root:1; 28 uint32_t root_id:6; 29 uint32_t identifier:2; [all …]
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| /linux/fs/xfs/ |
| H A D | xfs_stats.h | 44 uint32_t xs_allocx; 45 uint32_t xs_allocb; 46 uint32_t xs_freex; 47 uint32_t xs_freeb; 48 uint32_t xs_abt_lookup; 49 uint32_t xs_abt_compare; 50 uint32_t xs_abt_insrec; 51 uint32_t xs_abt_delrec; 52 uint32_t xs_blk_mapr; 53 uint32_t xs_blk_mapw; [all …]
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| /linux/drivers/gpu/drm/meson/ |
| H A D | meson_drv.h | 70 uint32_t osd1_ctrl_stat; 71 uint32_t osd1_ctrl_stat2; 72 uint32_t osd1_blk0_cfg[5]; 73 uint32_t osd1_blk1_cfg4; 74 uint32_t osd1_blk2_cfg4; 75 uint32_t osd1_addr; 76 uint32_t osd1_stride; 77 uint32_t osd1_height; 78 uint32_t osd1_width; 79 uint32_t osd_sc_ctrl0; [all …]
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