Searched refs:ucPllCntlFlag (Results 1 – 5 of 5) sorted by relevance
318 (uint32_t)(mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()321 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()324 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()327 (uint32_t)((mpll_parameters.ucPllCntlFlag & in atomctrl_get_memory_pll_dividers_si()449 pll_patameters.ucPllCntlFlag; in atomctrl_get_engine_pll_dividers_vi()519 pll_patameters.ucPllCntlFlag; in atomctrl_get_dfs_pll_dividers_vi()
1103 dividers->flags = args.v6_out.ucPllCntlFlag; in amdgpu_atombios_get_clock_dividers()1149 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); in amdgpu_atombios_get_memory_pll_dividers()1151 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()1153 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_QDR_ENABLE) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()1155 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_AD_HALF_RATE) ? 1 : 0; in amdgpu_atombios_get_memory_pll_dividers()
2932 dividers->flags = args.v6_out.ucPllCntlFlag; in radeon_atom_get_clock_dividers()2975 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); in radeon_atom_get_memory_pll_dividers()2977 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()2979 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_QDR_ENABLE) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()2981 (args.ucPllCntlFlag & MPLL_CNTL_FLAG_AD_HALF_RATE) ? 1 : 0; in radeon_atom_get_memory_pll_dividers()
527 UCHAR ucPllCntlFlag; //Output Flags: control flag member550 UCHAR ucPllCntlFlag; //Output: member
562 UCHAR ucPllCntlFlag; //Output Flags: control flag member612 UCHAR ucPllCntlFlag; //Output: member