| /linux/drivers/gpu/drm/amd/display/dc/dccg/dcn20/ |
| H A D | dcn20_dccg.h | 116 #define DCCG_REG_FIELD_LIST(type) \ argument
117 type DPPCLK0_DTO_PHASE;\
118 type DPPCLK0_DTO_MODULO;\
119 type DPPCLK_DTO_ENABLE[6];\
120 type DPPCLK_DTO_DB_EN[6];\
121 type REFCLK_CLOCK_EN;\
122 type REFCLK_SRC_SEL;\
123 type DISPCLK_STEP_DELAY;\
124 type DISPCLK_STEP_SIZE;\
125 type DISPCLK_FREQ_RAMP_DONE;\
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_link_encoder.h | 228 #define DCN_LINK_ENCODER_REG_FIELD_LIST(type) \ argument
229 type DIG_ENABLE;\
230 type DIG_HPD_SELECT;\
231 type DIG_MODE;\
232 type DIG_FE_SOURCE_SELECT;\
233 type DIG_CLOCK_PATTERN;\
234 type DPHY_BYPASS;\
235 type DPHY_ATEST_SEL_LANE0;\
236 type DPHY_ATEST_SEL_LANE1;\
237 type DPHY_ATEST_SEL_LANE2;\
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| H A D | dcn10_stream_encoder.h | 355 #define SE_REG_FIELD_LIST_DCN1_0(type) \ argument
356 type AFMT_GENERIC_INDEX;\
357 type AFMT_GENERIC_HB0;\
358 type AFMT_GENERIC_HB1;\
359 type AFMT_GENERIC_HB2;\
360 type AFMT_GENERIC_HB3;\
361 type AFMT_GENERIC_LOCK_STATUS;\
362 type AFMT_GENERIC_CONFLICT;\
363 type AFMT_GENERIC_CONFLICT_CLR;\
364 type AFMT_GENERIC0_FRAME_UPDATE_PENDING;\
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn10/ |
| H A D | dcn10_dpp.h | 479 #define TF_REG_FIELD_LIST(type) \ argument
480 type EXT_OVERSCAN_LEFT; \
481 type EXT_OVERSCAN_RIGHT; \
482 type EXT_OVERSCAN_BOTTOM; \
483 type EXT_OVERSCAN_TOP; \
484 type OTG_H_BLANK_START; \
485 type OTG_H_BLANK_END; \
486 type OTG_V_BLANK_START; \
487 type OTG_V_BLANK_END; \
488 type PIXEL_DEPTH; \
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn10/ |
| H A D | dcn10_hubbub.h | 206 #define HUBBUB_REG_FIELD_LIST_DCN32(type) \ argument
207 type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_VALUE;\
208 type DCHUBBUB_ARB_ALLOW_USR_RETRAINING_FORCE_ENABLE;\
209 type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PSTATE_CHANGE_REQUEST;\
210 type DCHUBBUB_ARB_DO_NOT_FORCE_ALLOW_USR_RETRAINING_DURING_PRE_CSTATE;\
211 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_A;\
212 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_B;\
213 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_C;\
214 type DCHUBBUB_ARB_USR_RETRAINING_WATERMARK_D;\
215 type DCHUBBUB_ARB_UCLK_PSTATE_CHANGE_WATERMARK_A;\
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| /linux/drivers/net/ethernet/microchip/vcap/ |
| H A D | vcap_model_kunit.c | 19 .type = VCAP_FIELD_U32,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U32,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_U32,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
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| /linux/drivers/net/ethernet/microchip/sparx5/lan969x/ |
| H A D | lan969x_vcap_ag_api.c | 18 .type = VCAP_FIELD_BIT,
23 .type = VCAP_FIELD_BIT,
28 .type = VCAP_FIELD_U32,
33 .type = VCAP_FIELD_U32,
38 .type = VCAP_FIELD_U32,
43 .type = VCAP_FIELD_U72,
48 .type = VCAP_FIELD_BIT,
53 .type = VCAP_FIELD_BIT,
58 .type = VCAP_FIELD_U32,
63 .type = VCAP_FIELD_U32,
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_vcap_ag_api.c | 19 .type = VCAP_FIELD_BIT,
24 .type = VCAP_FIELD_BIT,
29 .type = VCAP_FIELD_U32,
34 .type = VCAP_FIELD_U32,
39 .type = VCAP_FIELD_U32,
44 .type = VCAP_FIELD_U72,
49 .type = VCAP_FIELD_BIT,
54 .type = VCAP_FIELD_BIT,
59 .type = VCAP_FIELD_U32,
64 .type = VCAP_FIELD_U32,
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| /linux/drivers/net/ethernet/microchip/lan966x/ |
| H A D | lan966x_vcap_ag_api.c | 11 .type = VCAP_FIELD_BIT,
16 .type = VCAP_FIELD_U32,
21 .type = VCAP_FIELD_U32,
26 .type = VCAP_FIELD_BIT,
31 .type = VCAP_FIELD_BIT,
36 .type = VCAP_FIELD_BIT,
41 .type = VCAP_FIELD_BIT,
46 .type = VCAP_FIELD_BIT,
51 .type = VCAP_FIELD_BIT,
56 .type = VCAP_FIELD_BIT,
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.h | 373 #define TG_REG_FIELD_LIST_DCN1_0(type) \ argument
374 type VSTARTUP_START;\
375 type VUPDATE_OFFSET;\
376 type VUPDATE_WIDTH;\
377 type VREADY_OFFSET;\
378 type OTG_BLANK_DATA_EN;\
379 type OTG_BLANK_DE_MODE;\
380 type OTG_CURRENT_BLANK_STATE;\
381 type OTG_MASTER_UPDATE_LOCK;\
382 type UPDATE_LOCK_STATUS;\
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| /linux/net/ieee802154/ |
| H A D | nl_policy.c | 15 [IEEE802154_ATTR_DEV_NAME] = { .type = NLA_STRING, },
16 [IEEE802154_ATTR_DEV_INDEX] = { .type = NLA_U32, },
17 [IEEE802154_ATTR_PHY_NAME] = { .type = NLA_STRING, },
19 [IEEE802154_ATTR_STATUS] = { .type = NLA_U8, },
20 [IEEE802154_ATTR_SHORT_ADDR] = { .type = NLA_U16, },
21 [IEEE802154_ATTR_HW_ADDR] = { .type = NLA_HW_ADDR, },
22 [IEEE802154_ATTR_PAN_ID] = { .type = NLA_U16, },
23 [IEEE802154_ATTR_CHANNEL] = { .type = NLA_U8, },
24 [IEEE802154_ATTR_BCN_ORD] = { .type = NLA_U8, },
25 [IEEE802154_ATTR_SF_ORD] = { .type = NLA_U8, },
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.h | 409 #define DWBC_REG_FIELD_LIST_DCN3_0(type) \ argument
410 type DWB_ENABLE;\
411 type DISPCLK_R_DWB_GATE_DIS;\
412 type DISPCLK_G_DWB_GATE_DIS;\
413 type DWB_TEST_CLK_SEL;\
414 type DWBSCL_LUT_MEM_PWR_FORCE;\
415 type DWBSCL_LUT_MEM_PWR_DIS;\
416 type DWBSCL_LUT_MEM_PWR_STATE;\
417 type DWBSCL_LB_MEM_PWR_FORCE;\
418 type DWBSCL_LB_MEM_PWR_DIS;\
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| /linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/ |
| H A D | dcn20_dsc.h | 269 #define DSC_FIELD_LIST_DCN20(type)\ argument
270 type DSC_CLOCK_EN; \
271 type DSC_DISPCLK_R_GATE_DIS; \
272 type DSC_DSCCLK_R_GATE_DIS; \
273 type DSC_DBG_EN; \
274 type DSC_TEST_CLOCK_MUX_SEL; \
275 type ICH_RESET_AT_END_OF_LINE; \
276 type NUMBER_OF_SLICES_PER_LINE; \
277 type ALTERNATE_ICH_ENCODING_EN; \
278 type NUMBER_OF_SLICES_IN_VERTICAL_DIRECTION; \
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| /linux/net/devlink/ |
| H A D | netlink_gen.c | 42 [DEVLINK_PORT_FUNCTION_ATTR_HW_ADDR] = { .type = NLA_BINARY, },
50 [DEVLINK_RATE_TC_ATTR_BW] = { .type = NLA_U32, },
54 [DEVLINK_ATTR_SELFTEST_ID_FLASH] = { .type = NLA_FLAG, },
59 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
60 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
65 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
66 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
67 [DEVLINK_ATTR_PORT_INDEX] = { .type = NLA_U32, },
72 [DEVLINK_ATTR_BUS_NAME] = { .type = NLA_NUL_STRING, },
73 [DEVLINK_ATTR_DEV_NAME] = { .type = NLA_NUL_STRING, },
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| /linux/drivers/gpu/drm/amd/display/dc/mmhubbub/dcn20/ |
| H A D | dcn20_mmhubbub.h | 252 #define MCIF_WB_REG_FIELD_LIST_DCN2_0(type) \ argument
253 type MCIF_WB_BUFMGR_ENABLE;\
254 type MCIF_WB_BUFMGR_SW_INT_EN;\
255 type MCIF_WB_BUFMGR_SW_INT_ACK;\
256 type MCIF_WB_BUFMGR_SW_SLICE_INT_EN;\
257 type MCIF_WB_BUFMGR_SW_OVERRUN_INT_EN;\
258 type MCIF_WB_BUFMGR_SW_LOCK;\
259 type MCIF_WB_P_VMID;\
260 type MCIF_WB_BUF_ADDR_FENCE_EN;\
261 type MCIF_WB_BUFMGR_CUR_LINE_R;\
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| /linux/include/uapi/linux/ |
| H A D | v4l2-dv-timings.h | 26 .type = V4L2_DV_BT_656_1120, \
36 .type = V4L2_DV_BT_656_1120, \
46 .type = V4L2_DV_BT_656_1120, \
57 .type = V4L2_DV_BT_656_1120, \
67 .type = V4L2_DV_BT_656_1120, \
76 .type = V4L2_DV_BT_656_1120, \
85 .type = V4L2_DV_BT_656_1120, \
94 .type = V4L2_DV_BT_656_1120, \
104 .type = V4L2_DV_BT_656_1120, \
113 .type = V4L2_DV_BT_656_1120, \
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dwb.h | 202 #define DWBC_REG_FIELD_LIST_DCN2_0(type) \ argument
203 type WB_ENABLE;\
204 type DISPCLK_R_WB_GATE_DIS;\
205 type DISPCLK_G_WB_GATE_DIS;\
206 type DISPCLK_G_WBSCL_GATE_DIS;\
207 type WB_TEST_CLK_SEL;\
208 type WB_LB_LS_DIS;\
209 type WB_LB_SD_DIS;\
210 type WB_LUT_LS_DIS;\
211 type WBSCL_LB_MEM_PWR_MODE_SEL;\
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn20/ |
| H A D | dcn20_hubp.h | 181 #define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \ argument
182 DCN_HUBP_REG_FIELD_BASE_LIST(type); \
183 type DMDATA_ADDRESS_HIGH;\
184 type DMDATA_MODE;\
185 type DMDATA_UPDATED;\
186 type DMDATA_REPEAT;\
187 type DMDATA_SIZE;\
188 type DMDATA_SW_UPDATED;\
189 type DMDATA_SW_REPEAT;\
190 type DMDATA_SW_SIZE;\
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| /linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ |
| H A D | dcn10_hubp.h | 459 #define DCN_HUBP_REG_FIELD_BASE_LIST(type) \ argument
460 type HUBP_BLANK_EN;\
461 type HUBP_DISABLE;\
462 type HUBP_TTU_DISABLE;\
463 type HUBP_NO_OUTSTANDING_REQ;\
464 type HUBP_VTG_SEL;\
465 type HUBP_UNDERFLOW_STATUS;\
466 type HUBP_UNDERFLOW_CLEAR;\
467 type HUBP_IN_BLANK;\
468 type NUM_PIPES;\
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| /linux/net/tipc/ |
| H A D | netlink.c | 48 [TIPC_NLA_UNSPEC] = { .type = NLA_UNSPEC, },
49 [TIPC_NLA_BEARER] = { .type = NLA_NESTED, },
50 [TIPC_NLA_SOCK] = { .type = NLA_NESTED, },
51 [TIPC_NLA_PUBL] = { .type = NLA_NESTED, },
52 [TIPC_NLA_LINK] = { .type = NLA_NESTED, },
53 [TIPC_NLA_MEDIA] = { .type = NLA_NESTED, },
54 [TIPC_NLA_NODE] = { .type = NLA_NESTED, },
55 [TIPC_NLA_NET] = { .type = NLA_NESTED, },
56 [TIPC_NLA_NAME_TABLE] = { .type = NLA_NESTED, },
57 [TIPC_NLA_MON] = { .type = NLA_NESTED, },
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| /linux/drivers/gpu/drm/amd/display/dc/dpp/dcn401/ |
| H A D | dcn401_dpp.h | 382 #define DPP_REG_FIELD_LIST_DCN401(type) \ argument
383 DPP_REG_FIELD_LIST_DCN3(type); \
384 type CUR0_FP_BIAS_G_Y; \
385 type CUR0_FP_SCALE_G_Y; \
386 type CUR0_FP_BIAS_RB_CRCB; \
387 type CUR0_FP_SCALE_RB_CRCB; \
388 type CUR0_MATRIX_MODE; \
389 type CUR0_MATRIX_MODE_CURRENT; \
390 type CUR0_MATRIX_COEF_FORMAT; \
391 type CUR0_MATRIX_C11_A; \
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| /linux/drivers/media/pci/saa7134/ |
| H A D | saa7134-cards.c | 65 .type = SAA7134_INPUT_COMPOSITE,
80 .type = SAA7134_INPUT_COMPOSITE1,
84 .type = SAA7134_INPUT_TV,
88 .type = SAA7134_INPUT_TV_MONO,
93 .type = SAA7134_INPUT_RADIO,
108 .type = SAA7134_INPUT_TV,
113 .type = SAA7134_INPUT_TV_MONO,
118 .type = SAA7134_INPUT_COMPOSITE1,
123 .type = SAA7134_INPUT_COMPOSITE2,
128 .type = SAA7134_INPUT_SVIDEO,
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| /linux/fs/orangefs/ |
| H A D | orangefs-cache.c | 49 __s32 type = new_op->upcall.type; in get_opname_string() local
51 if (type == ORANGEFS_VFS_OP_FILE_IO) in get_opname_string()
53 else if (type == ORANGEFS_VFS_OP_LOOKUP) in get_opname_string()
55 else if (type == ORANGEFS_VFS_OP_CREATE) in get_opname_string()
57 else if (type == ORANGEFS_VFS_OP_GETATTR) in get_opname_string()
59 else if (type == ORANGEFS_VFS_OP_REMOVE) in get_opname_string()
61 else if (type == ORANGEFS_VFS_OP_MKDIR) in get_opname_string()
63 else if (type == ORANGEFS_VFS_OP_READDIR) in get_opname_string()
65 else if (type == ORANGEFS_VFS_OP_READDIRPLUS) in get_opname_string()
67 else if (type == ORANGEFS_VFS_OP_SETATTR) in get_opname_string()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.h | 148 #define DWBC_REG_FIELD_LIST(type) \ argument
149 type WB_ENABLE;\
150 type DISPCLK_R_WB_GATE_DIS;\
151 type DISPCLK_G_WB_GATE_DIS;\
152 type DISPCLK_G_WBSCL_GATE_DIS;\
153 type WB_LB_LS_DIS;\
154 type WB_LB_SD_DIS;\
155 type WB_LUT_LS_DIS;\
156 type CNV_WINDOW_CROP_EN;\
157 type CNV_STEREO_TYPE;\
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| /linux/Documentation/userspace-api/media/dvb/ |
| H A D | dmx.h.rst.exceptions | 10 replace enum dmx_ts_pes :c:type:`dmx_pes_type`
11 replace symbol DMX_PES_AUDIO0 :c:type:`dmx_pes_type`
12 replace symbol DMX_PES_VIDEO0 :c:type:`dmx_pes_type`
13 replace symbol DMX_PES_TELETEXT0 :c:type:`dmx_pes_type`
14 replace symbol DMX_PES_SUBTITLE0 :c:type:`dmx_pes_type`
15 replace symbol DMX_PES_PCR0 :c:type:`dmx_pes_type`
16 replace symbol DMX_PES_AUDIO1 :c:type:`dmx_pes_type`
17 replace symbol DMX_PES_VIDEO1 :c:type:`dmx_pes_type`
18 replace symbol DMX_PES_TELETEXT1 :c:type:`dmx_pes_type`
19 replace symbol DMX_PES_SUBTITLE1 :c:type:`dmx_pes_type`
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