Searched refs:tx_queues_to_use (Results 1 – 17 of 17) sorted by relevance
267 u32 tx_queues_cnt = priv->plat->tx_queues_to_use; in __stmmac_disable_all_queues()316 u32 tx_queues_cnt = priv->plat->tx_queues_to_use; in stmmac_enable_all_queues()389 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_eee_tx_busy()921 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_mac_flow_ctrl()1443 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_display_tx_rings()1577 u32 tx_queue_cnt = priv->plat->tx_queues_to_use; in stmmac_clear_descriptors()1993 tx_queue_cnt = priv->plat->tx_queues_to_use; in init_dma_tx_desc_rings()2062 u32 tx_queue_cnt = priv->plat->tx_queues_to_use; in stmmac_free_tx_skbufs()2158 u32 tx_count = priv->plat->tx_queues_to_use; in free_dma_tx_desc_resources()2336 u32 tx_count = priv->plat->tx_queues_to_use; in alloc_dma_tx_desc_resources()[all …]
18 queue >= priv->plat->tx_queues_to_use) in stmmac_xdp_enable_pool()65 queue >= priv->plat->tx_queues_to_use) in stmmac_xdp_disable_pool()
66 plat->tx_queues_to_use = 4; in snps_gmac5_default_data()70 for (i = 0; i < plat->tx_queues_to_use; i++) { in snps_gmac5_default_data()
112 plat->tx_queues_to_use = 8; in loongson_default_data()124 plat->tx_queues_to_use = 4; in loongson_default_data()385 ch_num = min(plat->tx_queues_to_use, plat->rx_queues_to_use); in loongson_dwmac_msi_config()554 plat->tx_fifo_size = SZ_16K * plat->tx_queues_to_use; in loongson_dwmac_probe()
484 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_get_per_qstats()521 u32 tx_queues_count = priv->plat->tx_queues_to_use; in stmmac_get_ethtool_stats()625 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_get_sset_count()658 u32 tx_cnt = priv->plat->tx_queues_to_use; in stmmac_get_qstats_string()789 tx_cnt = priv->plat->tx_queues_to_use; in __stmmac_get_coalesce()843 tx_cnt = priv->plat->tx_queues_to_use; in __stmmac_set_coalesce()985 chan->tx_count = priv->plat->tx_queues_to_use; in stmmac_get_channels()
615 for (i = 0; i < plat->tx_queues_to_use; i++) { in intel_mgbe_common_data()624 plat->tx_fifo_size = plat->tx_queues_to_use * 4096; in intel_mgbe_common_data()736 plat->tx_queues_to_use = 8; in ehl_common_data()897 plat->tx_queues_to_use = 4; in tgl_common_data()974 plat->tx_queues_to_use = 4; in adln_common_data()1170 for (i = 0; i < plat->tx_queues_to_use; i++) { in stmmac_config_multi_msi()
335 u32 tx_queues_count = priv->plat->tx_queues_to_use; in tc_setup_cbs()1080 for (i = 0; i < priv->plat->tx_queues_to_use; i++) { in tc_taprio_configure()1099 for (i = 0; i < priv->plat->tx_queues_to_use; i++) in tc_taprio_stats()1163 if (qopt->queue >= priv->plat->tx_queues_to_use) in tc_setup_etf()1211 netif_set_real_num_tx_queues(ndev, priv->plat->tx_queues_to_use); in stmmac_reset_tc_mqprio()
212 &plat->tx_queues_to_use); in stmmac_mtl_setup()227 if (queue >= plat->tx_queues_to_use) in stmmac_mtl_setup()266 if (queue != plat->tx_queues_to_use) { in stmmac_mtl_setup()
264 for (u32 i = 0; i < priv->plat->tx_queues_to_use; i++) { in dwxgmac3_fpe_map_preemption_class()
332 for (int i = 1; i < plat_dat->tx_queues_to_use; i++) in imx_dwmac_probe()
1703 u32 chan, tx_cnt = priv->plat->tx_queues_to_use; in stmmac_test_mjumbo()1769 for (i = 0; i < priv->plat->tx_queues_to_use; i++) in stmmac_test_tbs()1773 if (i >= priv->plat->tx_queues_to_use) in stmmac_test_tbs()
580 switch (plat_dat->tx_queues_to_use) { in socfpga_agilex5_setup_plat_dat()
590 for (i = 0; i < plat->tx_queues_to_use; i++) { in mediatek_dwmac_common_data()
832 for (i = 1; i < plat_dat->tx_queues_to_use; i++) in qcom_ethqos_probe()
72 if (priv->plat->tx_queues_to_use > 1) in dwmac4_update_caps()
249 u32 tx_queues_to_use; member
422 u32 tx_queues_to_use;