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Searched refs:ttu_regs (Results 1 – 25 of 38) sorted by relevance

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/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.c317 …ttu_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_ttu_regs_st *ttu_regs) in print__ttu_regs_st() argument
323 ttu_regs->qos_level_low_wm); in print__ttu_regs_st()
326 ttu_regs->qos_level_high_wm); in print__ttu_regs_st()
329 ttu_regs->min_ttu_vblank); in print__ttu_regs_st()
332 ttu_regs->qos_level_flip); in print__ttu_regs_st()
335 ttu_regs->refcyc_per_req_delivery_pre_l); in print__ttu_regs_st()
338 ttu_regs->refcyc_per_req_delivery_l); in print__ttu_regs_st()
341 ttu_regs->refcyc_per_req_delivery_pre_c); in print__ttu_regs_st()
344 ttu_regs->refcyc_per_req_delivery_c); in print__ttu_regs_st()
347 ttu_regs->refcyc_per_req_delivery_cur0); in print__ttu_regs_st()
[all …]
H A Ddisplay_mode_lib.h54 display_ttu_regs_st *ttu_regs,
72 display_ttu_regs_st *ttu_regs,
H A Ddml1_display_rq_dlg_calc.h57 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
H A Ddisplay_rq_dlg_helpers.h43 …tu_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.c207 display_ttu_regs_st *ttu_regs, in dml32_rq_dlg_get_dlg_reg() argument
266 memset(ttu_regs, 0, sizeof(*ttu_regs)); in dml32_rq_dlg_get_dlg_reg()
531 …ttu_regs->refcyc_per_req_delivery_pre_l = (unsigned int) (refcyc_per_req_delivery_pre_l * dml_pow(… in dml32_rq_dlg_get_dlg_reg()
532 ttu_regs->refcyc_per_req_delivery_l = (unsigned int) (refcyc_per_req_delivery_l * dml_pow(2, 10)); in dml32_rq_dlg_get_dlg_reg()
533 …ttu_regs->refcyc_per_req_delivery_pre_c = (unsigned int) (refcyc_per_req_delivery_pre_c * dml_pow(… in dml32_rq_dlg_get_dlg_reg()
534 ttu_regs->refcyc_per_req_delivery_c = (unsigned int) (refcyc_per_req_delivery_c * dml_pow(2, 10)); in dml32_rq_dlg_get_dlg_reg()
535 ttu_regs->refcyc_per_req_delivery_pre_cur0 = in dml32_rq_dlg_get_dlg_reg()
537 …ttu_regs->refcyc_per_req_delivery_cur0 = (unsigned int) (refcyc_per_req_delivery_cur0 * dml_pow(2,… in dml32_rq_dlg_get_dlg_reg()
538 ttu_regs->refcyc_per_req_delivery_pre_cur1 = 0; in dml32_rq_dlg_get_dlg_reg()
539 ttu_regs->refcyc_per_req_delivery_cur1 = 0; in dml32_rq_dlg_get_dlg_reg()
[all …]
H A Ddisplay_rq_dlg_calc_32.h65 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c305 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr; in dcn10_get_ttu_states() local
312 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_get_ttu_states()
313 …ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_get_ttu_states()
314 …ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per… in dcn10_get_ttu_states()
315 ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1, in dcn10_get_ttu_states()
316 …ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disabl… in dcn10_get_ttu_states()
317 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0, in dcn10_get_ttu_states()
318 … ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1); in dcn10_get_ttu_states()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_util.c300 void dml_print_ttu_regs_st(const dml_display_ttu_regs_st *ttu_regs) in dml_print_ttu_regs_st() argument
304 dml_print("DML: qos_level_low_wm = 0x%x\n", ttu_regs->qos_level_low_wm); in dml_print_ttu_regs_st()
305 dml_print("DML: qos_level_high_wm = 0x%x\n", ttu_regs->qos_level_high_wm); in dml_print_ttu_regs_st()
306 dml_print("DML: min_ttu_vblank = 0x%x\n", ttu_regs->min_ttu_vblank); in dml_print_ttu_regs_st()
307 dml_print("DML: qos_level_flip = 0x%x\n", ttu_regs->qos_level_flip); in dml_print_ttu_regs_st()
308 dml_print("DML: refcyc_per_req_delivery_pre_l = 0x%x\n", ttu_regs->refcyc_per_req_delivery_pre_l); in dml_print_ttu_regs_st()
309 dml_print("DML: refcyc_per_req_delivery_l = 0x%x\n", ttu_regs->refcyc_per_req_delivery_l); in dml_print_ttu_regs_st()
310 dml_print("DML: refcyc_per_req_delivery_pre_c = 0x%x\n", ttu_regs->refcyc_per_req_delivery_pre_c); in dml_print_ttu_regs_st()
311 dml_print("DML: refcyc_per_req_delivery_c = 0x%x\n", ttu_regs->refcyc_per_req_delivery_c); in dml_print_ttu_regs_st()
312 dml_print("DML: refcyc_per_req_delivery_cur0 = 0x%x\n", ttu_regs->refcyc_per_req_delivery_cur0); in dml_print_ttu_regs_st()
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H A Ddml2_translation_helper.c1507 memset(&out->ttu_regs, 0, sizeof(out->ttu_regs)); in dml2_update_pipe_ctx_dchub_regs()
1508 out->ttu_regs.qos_level_low_wm = disp_ttu_regs->qos_level_low_wm; in dml2_update_pipe_ctx_dchub_regs()
1509 out->ttu_regs.qos_level_high_wm = disp_ttu_regs->qos_level_high_wm; in dml2_update_pipe_ctx_dchub_regs()
1510 out->ttu_regs.min_ttu_vblank = disp_ttu_regs->min_ttu_vblank; in dml2_update_pipe_ctx_dchub_regs()
1511 out->ttu_regs.qos_level_flip = disp_ttu_regs->qos_level_flip; in dml2_update_pipe_ctx_dchub_regs()
1512 out->ttu_regs.refcyc_per_req_delivery_l = disp_ttu_regs->refcyc_per_req_delivery_l; in dml2_update_pipe_ctx_dchub_regs()
1513 out->ttu_regs.refcyc_per_req_delivery_c = disp_ttu_regs->refcyc_per_req_delivery_c; in dml2_update_pipe_ctx_dchub_regs()
1514 out->ttu_regs.refcyc_per_req_delivery_cur0 = disp_ttu_regs->refcyc_per_req_delivery_cur0; in dml2_update_pipe_ctx_dchub_regs()
1515 out->ttu_regs.refcyc_per_req_delivery_cur1 = disp_ttu_regs->refcyc_per_req_delivery_cur1; in dml2_update_pipe_ctx_dchub_regs()
1516 out->ttu_regs.refcyc_per_req_delivery_pre_l = disp_ttu_regs->refcyc_per_req_delivery_pre_l; in dml2_update_pipe_ctx_dchub_regs()
[all …]
H A Ddml_display_rq_dlg_calc.h56 dml_display_ttu_regs_st *ttu_regs,
H A Ddisplay_mode_util.h56 __DML_DLL_EXPORT__ void dml_print_ttu_regs_st(const dml_display_ttu_regs_st *ttu_regs);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.h60 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.h63 display_ttu_regs_st *ttu_regs,
H A Ddisplay_rq_dlg_calc_20v2.h63 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.h59 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.h59 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.h63 display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c435 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &s->ttu_attr; in dcn10_log_hubp_states() local
439 …pool->hubps[i]->inst, ttu_regs->qos_level_low_wm, ttu_regs->qos_level_high_wm, ttu_regs->min_ttu_v… in dcn10_log_hubp_states()
440 …ttu_regs->qos_level_flip, ttu_regs->refcyc_per_req_delivery_pre_l, ttu_regs->refcyc_per_req_delive… in dcn10_log_hubp_states()
441 …ttu_regs->refcyc_per_req_delivery_pre_c, ttu_regs->refcyc_per_req_delivery_c, ttu_regs->refcyc_per… in dcn10_log_hubp_states()
442 ttu_regs->refcyc_per_req_delivery_pre_cur0, ttu_regs->refcyc_per_req_delivery_cur1, in dcn10_log_hubp_states()
443 …ttu_regs->refcyc_per_req_delivery_pre_cur1, ttu_regs->qos_level_fixed_l, ttu_regs->qos_ramp_disabl… in dcn10_log_hubp_states()
444 ttu_regs->qos_level_fixed_c, ttu_regs->qos_ramp_disable_c, ttu_regs->qos_level_fixed_cur0, in dcn10_log_hubp_states()
445 … ttu_regs->qos_ramp_disable_cur0, ttu_regs->qos_level_fixed_cur1, ttu_regs->qos_ramp_disable_cur1); in dcn10_log_hubp_states()
3055 &pipe_ctx->ttu_regs, in dcn10_update_dchubp_dpp()
3061 &pipe_ctx->ttu_regs); in dcn10_update_dchubp_dpp()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dhubp.h162 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
175 struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
H A Dmem_input.h108 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c357 hubp401_program_deadline(hubp, &pipe_regs->dlg_regs, &pipe_regs->ttu_regs); in hubp401_setup()
396 pipe_regs->ttu_regs.refcyc_per_req_delivery_pre_l); in hubp401_setup_interdependent()
399 pipe_regs->ttu_regs.refcyc_per_req_delivery_pre_c); in hubp401_setup_interdependent()
401 REFCYC_PER_REQ_DELIVERY_PRE, pipe_regs->ttu_regs.refcyc_per_req_delivery_pre_cur0); in hubp401_setup_interdependent()
404 MIN_TTU_VBLANK, pipe_regs->ttu_regs.min_ttu_vblank, in hubp401_setup_interdependent()
405 QoS_LEVEL_FLIP, pipe_regs->ttu_regs.qos_level_flip); in hubp401_setup_interdependent()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/
H A Ddml_top_dchub_registers.h150 struct dml2_display_ttu_regs ttu_regs; member
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c2975 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = params->hubp_setup_params.ttu_regs; in hwss_hubp_setup() local
2980 hubp->funcs->hubp_setup(hubp, dlg_regs, ttu_regs, rq_regs, pipe_dest); in hwss_hubp_setup()
3005 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = params->hubp_setup_interdependent_params.ttu_regs; in hwss_hubp_setup_interdependent() local
3008 hubp->funcs->hubp_setup_interdependent(hubp, dlg_regs, ttu_regs); in hwss_hubp_setup_interdependent()
3824 struct _vcs_dpi_display_ttu_regs_st *ttu_regs, in hwss_add_hubp_setup() argument
3832 seq_state->steps[*seq_state->num_steps].params.hubp_setup_params.ttu_regs = ttu_regs; in hwss_add_hubp_setup()
3866 struct _vcs_dpi_display_ttu_regs_st *ttu_regs) in hwss_add_hubp_setup_interdependent() argument
3872 …eq_state->steps[*seq_state->num_steps].params.hubp_setup_interdependent_params.ttu_regs = ttu_regs; in hwss_add_hubp_setup_interdependent()
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h651 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; member
669 struct _vcs_dpi_display_ttu_regs_st *ttu_regs; member
1925 struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
1940 struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c460 struct _vcs_dpi_display_ttu_regs_st *ttu_regs = &pipe->ttu_regs; in dcn_bw_calc_rq_dlg_ttu() local
471 memset(ttu_regs, 0, sizeof(*ttu_regs)); in dcn_bw_calc_rq_dlg_ttu()
512 ttu_regs, in dcn_bw_calc_rq_dlg_ttu()

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