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Searched refs:sq (Results 1 – 25 of 258) sorted by relevance

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/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_tx.c47 static void mlx5e_dma_unmap_wqe_err(struct mlx5e_txqsq *sq, u8 num_dma) in mlx5e_dma_unmap_wqe_err() argument
53 mlx5e_dma_get(sq, --sq->dma_fifo_pc); in mlx5e_dma_unmap_wqe_err()
55 mlx5e_tx_dma_unmap(sq->pdev, last_pushed_dma); in mlx5e_dma_unmap_wqe_err()
120 mlx5e_txwqe_build_eseg_csum(struct mlx5e_txqsq *sq, struct sk_buff *skb, in mlx5e_txwqe_build_eseg_csum() argument
125 if (unlikely(mlx5e_psp_txwqe_build_eseg_csum(sq, skb, &accel->psp_st, eseg))) in mlx5e_txwqe_build_eseg_csum()
129 if (unlikely(mlx5e_ipsec_txwqe_build_eseg_csum(sq, skb, eseg))) in mlx5e_txwqe_build_eseg_csum()
137 sq->stats->csum_partial_inner++; in mlx5e_txwqe_build_eseg_csum()
140 sq->stats->csum_partial++; in mlx5e_txwqe_build_eseg_csum()
145 sq->stats->csum_partial++; in mlx5e_txwqe_build_eseg_csum()
148 sq->stats->csum_none++; in mlx5e_txwqe_build_eseg_csum()
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H A Dwc.c158 struct mlx5_wc_sq *sq) in create_wc_sq() argument
165 sizeof(u64) * sq->wq_ctrl.buf.npages; in create_wc_sq()
174 MLX5_SET(sqc, sqc, cqn, sq->cq.mcq.cqn); in create_wc_sq()
185 MLX5_SET(wq, wq, uar_page, sq->bfreg.index); in create_wc_sq()
186 MLX5_SET(wq, wq, log_wq_pg_sz, sq->wq_ctrl.buf.page_shift - in create_wc_sq()
188 MLX5_SET64(wq, wq, dbr_addr, sq->wq_ctrl.db.dma); in create_wc_sq()
190 mlx5_fill_page_frag_array(&sq->wq_ctrl.buf, in create_wc_sq()
193 err = mlx5_core_create_sq(mdev, in, inlen, &sq->sqn); in create_wc_sq()
204 err = mlx5_core_modify_sq(mdev, sq->sqn, in); in create_wc_sq()
207 sq->sqn, err); in create_wc_sq()
[all …]
H A Den_txrx.c49 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq) in mlx5e_handle_tx_dim() argument
51 struct mlx5e_sq_stats *stats = sq->stats; in mlx5e_handle_tx_dim()
54 if (unlikely(!test_bit(MLX5E_SQ_STATE_DIM, &sq->state))) in mlx5e_handle_tx_dim()
57 dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample); in mlx5e_handle_tx_dim()
58 net_dim(sq->dim, &dim_sample); in mlx5e_handle_tx_dim()
73 void mlx5e_trigger_irq(struct mlx5e_icosq *sq) in mlx5e_trigger_irq() argument
75 struct mlx5_wq_cyc *wq = &sq->wq; in mlx5e_trigger_irq()
77 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc); in mlx5e_trigger_irq()
79 sq->db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) { in mlx5e_trigger_irq()
84 nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc); in mlx5e_trigger_irq()
[all …]
/linux/drivers/nvme/target/
H A Dfabrics-cmd-auth.c17 struct nvmet_sq *sq = container_of(to_delayed_work(work), in nvmet_auth_expired_work() local
21 __func__, sq->ctrl->cntlid, sq->qid, sq->dhchap_tid); in nvmet_auth_expired_work()
22 sq->dhchap_step = NVME_AUTH_DHCHAP_MESSAGE_NEGOTIATE; in nvmet_auth_expired_work()
23 sq->dhchap_tid = -1; in nvmet_auth_expired_work()
26 void nvmet_auth_sq_init(struct nvmet_sq *sq) in nvmet_auth_sq_init() argument
29 INIT_DELAYED_WORK(&sq->auth_expired_work, nvmet_auth_expired_work); in nvmet_auth_sq_init()
30 sq->authenticated = false; in nvmet_auth_sq_init()
31 sq->dhchap_step = NVME_AUTH_DHCHAP_MESSAGE_NEGOTIATE; in nvmet_auth_sq_init()
36 struct nvmet_ctrl *ctrl = req->sq->ctrl; in nvmet_auth_negotiate()
41 __func__, ctrl->cntlid, req->sq->qid, in nvmet_auth_negotiate()
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H A Dauth.c143 u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq) in nvmet_setup_auth() argument
169 if (nvmet_queue_tls_keyid(sq)) { in nvmet_setup_auth()
239 void nvmet_auth_sq_free(struct nvmet_sq *sq) in nvmet_auth_sq_free() argument
241 cancel_delayed_work(&sq->auth_expired_work); in nvmet_auth_sq_free()
243 sq->tls_key = NULL; in nvmet_auth_sq_free()
245 kfree(sq->dhchap_c1); in nvmet_auth_sq_free()
246 sq->dhchap_c1 = NULL; in nvmet_auth_sq_free()
247 kfree(sq->dhchap_c2); in nvmet_auth_sq_free()
248 sq->dhchap_c2 = NULL; in nvmet_auth_sq_free()
249 kfree(sq->dhchap_skey); in nvmet_auth_sq_free()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dxdp.c61 mlx5e_xmit_xdp_buff(struct mlx5e_xdpsq *sq, struct mlx5e_rq *rq, in mlx5e_xmit_xdp_buff() argument
96 dma_addr = dma_map_single(sq->pdev, xdptxd->data, xdptxd->len, in mlx5e_xmit_xdp_buff()
98 if (dma_mapping_error(sq->pdev, dma_addr)) { in mlx5e_xmit_xdp_buff()
105 if (unlikely(!INDIRECT_CALL_2(sq->xmit_xdp_frame, mlx5e_xmit_xdp_frame_mpwqe, in mlx5e_xmit_xdp_buff()
106 mlx5e_xmit_xdp_frame, sq, xdptxd, 0, NULL))) in mlx5e_xmit_xdp_buff()
110 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, in mlx5e_xmit_xdp_buff()
112 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, in mlx5e_xmit_xdp_buff()
114 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, in mlx5e_xmit_xdp_buff()
126 dma_sync_single_for_device(sq->pdev, dma_addr, xdptxd->len, DMA_BIDIRECTIONAL); in mlx5e_xmit_xdp_buff()
140 dma_sync_single_for_device(sq->pdev, addr, len, in mlx5e_xmit_xdp_buff()
[all …]
H A Dreporter_tx.c23 static int mlx5e_wait_for_sq_flush(struct mlx5e_txqsq *sq) in mlx5e_wait_for_sq_flush() argument
25 struct mlx5_core_dev *dev = sq->mdev; in mlx5e_wait_for_sq_flush()
31 if (sq->cc == sq->pc) in mlx5e_wait_for_sq_flush()
37 netdev_err(sq->netdev, in mlx5e_wait_for_sq_flush()
39 sq->sqn, sq->cc, sq->pc); in mlx5e_wait_for_sq_flush()
44 static void mlx5e_reset_txqsq_cc_pc(struct mlx5e_txqsq *sq) in mlx5e_reset_txqsq_cc_pc() argument
46 WARN_ONCE(sq->cc != sq->pc, in mlx5e_reset_txqsq_cc_pc()
48 sq->sqn, sq->cc, sq->pc); in mlx5e_reset_txqsq_cc_pc()
49 sq->cc = 0; in mlx5e_reset_txqsq_cc_pc()
50 sq->pc = 0; in mlx5e_reset_txqsq_cc_pc()
[all …]
H A Dxdp.h102 void mlx5e_xdp_mpwqe_complete(struct mlx5e_xdpsq *sq);
104 void mlx5e_free_xdpsq_descs(struct mlx5e_xdpsq *sq);
105 void mlx5e_set_xmit_fp(struct mlx5e_xdpsq *sq, bool is_mpw);
113 INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame_mpwqe(struct mlx5e_xdpsq *sq,
117 INDIRECT_CALLABLE_DECLARE(bool mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq,
121 INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check_mpwqe(struct mlx5e_xdpsq *sq));
122 INDIRECT_CALLABLE_DECLARE(int mlx5e_xmit_xdp_frame_check(struct mlx5e_xdpsq *sq));
152 static inline void mlx5e_xmit_xdp_doorbell(struct mlx5e_xdpsq *sq) in mlx5e_xmit_xdp_doorbell() argument
154 if (sq->doorbell_cseg) { in mlx5e_xmit_xdp_doorbell()
155 mlx5e_notify_hw(&sq->wq, sq->pc, sq->uar_map, sq->doorbell_cseg); in mlx5e_xmit_xdp_doorbell()
[all …]
H A Dtxrx.h81 void mlx5e_trigger_irq(struct mlx5e_icosq *sq);
115 void mlx5e_free_txqsq_descs(struct mlx5e_txqsq *sq);
139 #define MLX5E_TX_FETCH_WQE(sq, pi) \ argument
140 ((struct mlx5e_tx_wqe *)mlx5e_fetch_wqe(&(sq)->wq, pi, sizeof(struct mlx5e_tx_wqe)))
188 static inline u16 mlx5e_txqsq_get_next_pi(struct mlx5e_txqsq *sq, u16 size) in mlx5e_txqsq_get_next_pi() argument
190 struct mlx5_wq_cyc *wq = &sq->wq; in mlx5e_txqsq_get_next_pi()
193 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc); in mlx5e_txqsq_get_next_pi()
198 wi = &sq->db.wqe_info[pi]; in mlx5e_txqsq_get_next_pi()
206 mlx5e_post_nop(wq, sq->sqn, &sq->pc); in mlx5e_txqsq_get_next_pi()
208 sq->stats->nop += contig_wqebbs; in mlx5e_txqsq_get_next_pi()
[all …]
H A Dqos.c79 struct mlx5e_txqsq *sq; in mlx5e_open_qos_sq() local
117 sq = kzalloc_obj(*sq); in mlx5e_open_qos_sq()
119 if (!sq) in mlx5e_open_qos_sq()
128 err = mlx5e_open_cq(c->mdev, params->tx_cq_moderation, &param_cq, &ccp, &sq->cq); in mlx5e_open_qos_sq()
134 err = mlx5e_open_txqsq(c, tisn, txq_ix, params, &param_sq, sq, 0, hw_id, in mlx5e_open_qos_sq()
139 rcu_assign_pointer(qos_sqs[qid], sq); in mlx5e_open_qos_sq()
144 mlx5e_close_cq(&sq->cq); in mlx5e_open_qos_sq()
146 kfree(sq); in mlx5e_open_qos_sq()
160 struct mlx5e_txqsq *sq; in mlx5e_activate_qos_sq() local
163 sq = mlx5e_get_qos_sq(priv, node_qid); in mlx5e_activate_qos_sq()
[all …]
/linux/tools/include/io_uring/
H A Dmini_liburing.h56 struct io_uring_sq sq; member
71 struct io_uring_sq *sq, struct io_uring_cq *cq) in io_uring_mmap() argument
78 sq->ring_sz = p->cq_off.cqes; in io_uring_mmap()
79 sq->ring_sz += p->cq_entries * sizeof(struct io_uring_cqe); in io_uring_mmap()
81 sq->ring_sz = p->sq_off.array; in io_uring_mmap()
82 sq->ring_sz += p->sq_entries * sizeof(unsigned int); in io_uring_mmap()
85 ptr = mmap(0, sq->ring_sz, PROT_READ | PROT_WRITE, in io_uring_mmap()
89 sq->khead = ptr + p->sq_off.head; in io_uring_mmap()
90 sq->ktail = ptr + p->sq_off.tail; in io_uring_mmap()
91 sq->kring_mask = ptr + p->sq_off.ring_mask; in io_uring_mmap()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/
H A Dtx.c48 static void mlx5e_xsk_tx_post_err(struct mlx5e_xdpsq *sq, in mlx5e_xsk_tx_post_err() argument
51 u16 pi = mlx5_wq_cyc_ctr2ix(&sq->wq, sq->pc); in mlx5e_xsk_tx_post_err()
52 struct mlx5e_xdp_wqe_info *wi = &sq->db.wqe_info[pi]; in mlx5e_xsk_tx_post_err()
58 nopwqe = mlx5e_post_nop(&sq->wq, sq->sqn, &sq->pc); in mlx5e_xsk_tx_post_err()
59 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, *xdpi); in mlx5e_xsk_tx_post_err()
60 if (xp_tx_metadata_enabled(sq->xsk_pool)) in mlx5e_xsk_tx_post_err()
61 mlx5e_xdpi_fifo_push(&sq->db.xdpi_fifo, in mlx5e_xsk_tx_post_err()
63 sq->doorbell_cseg = &nopwqe->ctrl; in mlx5e_xsk_tx_post_err()
66 bool mlx5e_xsk_tx(struct mlx5e_xdpsq *sq, unsigned int budget) in mlx5e_xsk_tx() argument
68 struct xsk_buff_pool *pool = sq->xsk_pool; in mlx5e_xsk_tx()
[all …]
/linux/sound/oss/dmasound/
H A Ddmasound_core.c408 static int sq_allocate_buffers(struct sound_queue *sq, int num, int size) in sq_allocate_buffers() argument
412 if (sq->buffers) in sq_allocate_buffers()
414 sq->numBufs = num; in sq_allocate_buffers()
415 sq->bufSize = size; in sq_allocate_buffers()
416 sq->buffers = kmalloc_array (num, sizeof(char *), GFP_KERNEL); in sq_allocate_buffers()
417 if (!sq->buffers) in sq_allocate_buffers()
420 sq->buffers[i] = dmasound.mach.dma_alloc(size, GFP_KERNEL); in sq_allocate_buffers()
421 if (!sq->buffers[i]) { in sq_allocate_buffers()
423 dmasound.mach.dma_free(sq->buffers[i], size); in sq_allocate_buffers()
424 kfree(sq->buffers); in sq_allocate_buffers()
[all …]
/linux/drivers/net/ethernet/cavium/thunder/
H A Dnicvf_queues.c20 static inline void nicvf_sq_add_gather_subdesc(struct snd_queue *sq, int qentry,
504 struct snd_queue *sq, int q_len, int qidx) in nicvf_init_snd_queue() argument
508 err = nicvf_alloc_q_desc_mem(nic, &sq->dmem, q_len, SND_QUEUE_DESC_SIZE, in nicvf_init_snd_queue()
513 sq->desc = sq->dmem.base; in nicvf_init_snd_queue()
514 sq->skbuff = kcalloc(q_len, sizeof(u64), GFP_KERNEL); in nicvf_init_snd_queue()
515 if (!sq->skbuff) in nicvf_init_snd_queue()
518 sq->head = 0; in nicvf_init_snd_queue()
519 sq->tail = 0; in nicvf_init_snd_queue()
520 sq->thresh = SND_QUEUE_THRESH; in nicvf_init_snd_queue()
527 sq->xdp_page = kcalloc(q_len, sizeof(u64), GFP_KERNEL); in nicvf_init_snd_queue()
[all …]
/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_txrx.c34 static int otx2_get_free_sqe(struct otx2_snd_queue *sq) in otx2_get_free_sqe() argument
36 return (sq->cons_head - sq->head - 1 + sq->sqe_cnt) in otx2_get_free_sqe()
37 & (sq->sqe_cnt - 1); in otx2_get_free_sqe()
46 static void otx2_sq_set_sqe_base(struct otx2_snd_queue *sq, in otx2_sq_set_sqe_base() argument
51 sq->sqe_base = sq->sqe_ring->base + sq->sqe_size + in otx2_sq_set_sqe_base()
52 (sq->head * (sq->sqe_size * 2)); in otx2_sq_set_sqe_base()
54 sq->sqe_base = sq->sqe->base; in otx2_sq_set_sqe_base()
106 struct otx2_snd_queue *sq, in otx2_xdp_snd_pkt_handler() argument
113 sg = &sq->sg[snd_comp->sqe_id]; in otx2_xdp_snd_pkt_handler()
127 struct otx2_snd_queue *sq, in otx2_snd_pkt_handler() argument
[all …]
H A Dqos_sq.c38 struct otx2_snd_queue *sq; in otx2_qos_sq_aura_pool_init() local
76 sq = &qset->sq[qidx]; in otx2_qos_sq_aura_pool_init()
77 sq->sqb_count = 0; in otx2_qos_sq_aura_pool_init()
78 sq->sqb_ptrs = kcalloc(num_sqbs, sizeof(*sq->sqb_ptrs), GFP_KERNEL); in otx2_qos_sq_aura_pool_init()
79 if (!sq->sqb_ptrs) { in otx2_qos_sq_aura_pool_init()
89 sq->sqb_ptrs[sq->sqb_count++] = (u64)bufptr; in otx2_qos_sq_aura_pool_init()
96 if (!sq->sqb_ptrs[ptr]) in otx2_qos_sq_aura_pool_init()
98 iova = sq->sqb_ptrs[ptr]; in otx2_qos_sq_aura_pool_init()
106 sq->sqb_count = 0; in otx2_qos_sq_aura_pool_init()
107 kfree(sq->sqb_ptrs); in otx2_qos_sq_aura_pool_init()
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dktls_rx.c129 static void icosq_fill_wi(struct mlx5e_icosq *sq, u16 pi, in icosq_fill_wi() argument
132 sq->db.wqe_info[pi] = *wi; in icosq_fill_wi()
136 post_static_params(struct mlx5e_icosq *sq, in post_static_params() argument
144 if (unlikely(!mlx5e_icosq_can_post_wqe(sq, num_wqebbs))) in post_static_params()
147 pi = mlx5e_icosq_get_next_pi(sq, num_wqebbs); in post_static_params()
148 wqe = MLX5E_TLS_FETCH_SET_STATIC_PARAMS_WQE(sq, pi); in post_static_params()
149 mlx5e_ktls_build_static_params(wqe, sq->pc, sq->sqn, &priv_rx->crypto_info, in post_static_params()
159 icosq_fill_wi(sq, pi, &wi); in post_static_params()
160 sq->pc += num_wqebbs; in post_static_params()
166 post_progress_params(struct mlx5e_icosq *sq, in post_progress_params() argument
[all …]
/linux/drivers/infiniband/hw/erdma/
H A Derdma_cmdq.c26 u64 db_data = FIELD_PREP(ERDMA_CMD_HDR_WQEBB_INDEX_MASK, cmdq->sq.pi); in kick_cmdq_db()
28 *cmdq->sq.dbrec = db_data; in kick_cmdq_db()
91 struct erdma_cmdq_sq *sq = &cmdq->sq; in erdma_cmdq_sq_init() local
93 sq->wqebb_cnt = SQEBB_COUNT(ERDMA_CMDQ_SQE_SIZE); in erdma_cmdq_sq_init()
94 sq->depth = cmdq->max_outstandings * sq->wqebb_cnt; in erdma_cmdq_sq_init()
96 sq->qbuf = dma_alloc_coherent(&dev->pdev->dev, sq->depth << SQEBB_SHIFT, in erdma_cmdq_sq_init()
97 &sq->qbuf_dma_addr, GFP_KERNEL); in erdma_cmdq_sq_init()
98 if (!sq->qbuf) in erdma_cmdq_sq_init()
101 sq->dbrec = dma_pool_zalloc(dev->db_pool, GFP_KERNEL, &sq->dbrec_dma); in erdma_cmdq_sq_init()
102 if (!sq->dbrec) in erdma_cmdq_sq_init()
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_controlq.c8 (qinfo)->sq.head = prefix##_ATQH; \
9 (qinfo)->sq.tail = prefix##_ATQT; \
10 (qinfo)->sq.len = prefix##_ATQLEN; \
11 (qinfo)->sq.bah = prefix##_ATQBAH; \
12 (qinfo)->sq.bal = prefix##_ATQBAL; \
13 (qinfo)->sq.len_mask = prefix##_ATQLEN_ATQLEN_M; \
14 (qinfo)->sq.len_ena_mask = prefix##_ATQLEN_ATQENABLE_M; \
15 (qinfo)->sq.len_crit_mask = prefix##_ATQLEN_ATQCRIT_M; \
16 (qinfo)->sq.head_mask = prefix##_ATQH_ATQH_M; \
77 if (cq->sq.len && cq->sq.len_mask && cq->sq.len_ena_mask) in ice_check_sq_alive()
[all …]
/linux/drivers/soc/qcom/
H A Dqmi_interface.c19 struct sockaddr_qrtr *sq);
168 struct sockaddr_qrtr sq; in qmi_send_new_lookup() local
178 sq.sq_family = qmi->sq.sq_family; in qmi_send_new_lookup()
179 sq.sq_node = qmi->sq.sq_node; in qmi_send_new_lookup()
180 sq.sq_port = QRTR_PORT_CTRL; in qmi_send_new_lookup()
182 msg.msg_name = &sq; in qmi_send_new_lookup()
183 msg.msg_namelen = sizeof(sq); in qmi_send_new_lookup()
231 struct sockaddr_qrtr sq; in qmi_send_new_server() local
240 pkt.server.node = cpu_to_le32(qmi->sq.sq_node); in qmi_send_new_server()
241 pkt.server.port = cpu_to_le32(qmi->sq.sq_port); in qmi_send_new_server()
[all …]
/linux/net/qrtr/
H A Dns.c53 struct sockaddr_qrtr sq; member
195 static int announce_servers(struct sockaddr_qrtr *sq) in announce_servers() argument
208 ret = service_announce_new(sq, srv); in announce_servers()
291 lookup_notify(&lookup->sq, srv, false); in server_del()
323 static int ctrl_cmd_hello(struct sockaddr_qrtr *sq) in ctrl_cmd_hello() argument
327 ret = say_hello(sq); in ctrl_cmd_hello()
331 return announce_servers(sq); in ctrl_cmd_hello()
339 struct sockaddr_qrtr sq; in ctrl_cmd_bye() local
367 sq.sq_family = AF_QIPCRTR; in ctrl_cmd_bye()
368 sq.sq_node = srv->node; in ctrl_cmd_bye()
[all …]
/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_qp.c59 #define SQ_DB_ADDR(sq, pi) ((u64 *)((sq)->db_base) + SQ_DB_PI_LOW(pi)) argument
61 #define SQ_MASKED_IDX(sq, idx) ((idx) & (sq)->wq->mask) argument
93 struct hinic_sq *sq, u16 global_qid) in hinic_sq_prepare_ctxt() argument
100 wq = sq->wq; in hinic_sq_prepare_ctxt()
219 static int alloc_sq_skb_arr(struct hinic_sq *sq) in alloc_sq_skb_arr() argument
221 struct hinic_wq *wq = sq->wq; in alloc_sq_skb_arr()
224 skb_arr_size = wq->q_depth * sizeof(*sq->saved_skb); in alloc_sq_skb_arr()
225 sq->saved_skb = vzalloc(skb_arr_size); in alloc_sq_skb_arr()
226 if (!sq->saved_skb) in alloc_sq_skb_arr()
236 static void free_sq_skb_arr(struct hinic_sq *sq) in free_sq_skb_arr() argument
[all …]
H A Dhinic_tx.c47 #define HW_CONS_IDX(sq) be16_to_cpu(*(u16 *)((sq)->hw_ci_addr)) argument
503 qp = container_of(txq->sq, struct hinic_qp, sq); in hinic_lb_xmit_frame()
512 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx); in hinic_lb_xmit_frame()
516 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx); in hinic_lb_xmit_frame()
533 hinic_sq_prepare_wqe(txq->sq, sq_wqe, txq->sges, nr_sges); in hinic_lb_xmit_frame()
534 hinic_sq_write_wqe(txq->sq, prod_idx, sq_wqe, skb, wqe_size); in hinic_lb_xmit_frame()
539 hinic_sq_write_db(txq->sq, prod_idx, wqe_size, 0); in hinic_lb_xmit_frame()
564 qp = container_of(txq->sq, struct hinic_qp, sq); in hinic_xmit_frame()
593 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx); in hinic_xmit_frame()
600 sq_wqe = hinic_sq_get_wqe(txq->sq, wqe_size, &prod_idx); in hinic_xmit_frame()
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/linux/block/
H A Dblk-throttle.c59 static struct throtl_grp *sq_to_tg(struct throtl_service_queue *sq) in sq_to_tg() argument
61 if (sq && sq->parent_sq) in sq_to_tg()
62 return container_of(sq, struct throtl_grp, service_queue); in sq_to_tg()
74 static struct throtl_data *sq_to_td(struct throtl_service_queue *sq) in sq_to_td() argument
76 struct throtl_grp *tg = sq_to_tg(sq); in sq_to_td()
81 return container_of(sq, struct throtl_data, service_queue); in sq_to_td()
113 #define throtl_log(sq, fmt, args...) do { \ argument
114 struct throtl_grp *__tg = sq_to_tg((sq)); \
115 struct throtl_data *__td = sq_to_td((sq)); \
155 struct throtl_service_queue *sq) in throtl_qnode_add_bio() argument
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/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/
H A Dsend.c100 static void hws_send_engine_post_ring(struct mlx5hws_send_ring_sq *sq, in hws_send_engine_post_ring() argument
106 *sq->wq.db = cpu_to_be32(sq->cur_post); in hws_send_engine_post_ring()
113 mlx5_write64((__be32 *)doorbell_cseg, sq->uar_map); in hws_send_engine_post_ring()
139 struct mlx5hws_send_ring_sq *sq; in mlx5hws_send_engine_post_end() local
143 sq = &ctrl->send_ring->send_sq; in mlx5hws_send_engine_post_end()
144 idx = sq->cur_post & sq->buf_mask; in mlx5hws_send_engine_post_end()
145 sq->last_idx = idx; in mlx5hws_send_engine_post_end()
147 wqe_ctrl = mlx5_wq_cyc_get_wqe(&sq->wq, idx); in mlx5hws_send_engine_post_end()
151 ((sq->cur_post & 0xffff) << 8) | in mlx5hws_send_engine_post_end()
155 sq->sqn << 8); in mlx5hws_send_engine_post_end()
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