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Searched refs:rq_regs (Results 1 – 25 of 25) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn21/ !
H A Ddcn21_hubp.c139 struct _vcs_dpi_display_rq_regs_st *rq_regs) in hubp21_program_requestor() argument
144 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp21_program_requestor()
146 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode, in hubp21_program_requestor()
147 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode, in hubp21_program_requestor()
148 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode, in hubp21_program_requestor()
149 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode); in hubp21_program_requestor()
151 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp21_program_requestor()
152 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size, in hubp21_program_requestor()
153 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size, in hubp21_program_requestor()
154 MIN_META_CHUNK_SIZE, rq_regs->rq_regs_l.min_meta_chunk_size, in hubp21_program_requestor()
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H A Ddcn21_hubp.h133 struct _vcs_dpi_display_rq_regs_st *rq_regs);
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn201/ !
H A Ddcn201_hubp.c67 struct _vcs_dpi_display_rq_regs_st *rq_regs) in hubp201_program_requestor() argument
72 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address); in hubp201_program_requestor()
75 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode, in hubp201_program_requestor()
76 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode, in hubp201_program_requestor()
77 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode, in hubp201_program_requestor()
78 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode); in hubp201_program_requestor()
82 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size, in hubp201_program_requestor()
83 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size, in hubp201_program_requestor()
84 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size, in hubp201_program_requestor()
85 MIN_META_CHUNK_SIZE, rq_regs->rq_regs_l.min_meta_chunk_size, in hubp201_program_requestor()
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/ !
H A Ddml_display_rq_dlg_calc.c39 void dml_rq_dlg_get_rq_reg(dml_display_rq_regs_st *rq_regs, in dml_rq_dlg_get_rq_reg() argument
73 memset(rq_regs, 0, sizeof(*rq_regs)); in dml_rq_dlg_get_rq_reg()
97 rq_regs->rq_regs_l.chunk_size = (dml_uint_t)(dml_log2((dml_float_t) pixel_chunk_bytes) - 10); in dml_rq_dlg_get_rq_reg()
98 rq_regs->rq_regs_c.chunk_size = (dml_uint_t)(dml_log2((dml_float_t) p1_pixel_chunk_bytes) - 10); in dml_rq_dlg_get_rq_reg()
101 rq_regs->rq_regs_l.min_chunk_size = 0; in dml_rq_dlg_get_rq_reg()
103 …rq_regs->rq_regs_l.min_chunk_size = (dml_uint_t)(dml_log2((dml_float_t) min_pixel_chunk_bytes) - 8… in dml_rq_dlg_get_rq_reg()
106 rq_regs->rq_regs_c.min_chunk_size = 0; in dml_rq_dlg_get_rq_reg()
108 …rq_regs->rq_regs_c.min_chunk_size = (dml_uint_t)(dml_log2((dml_float_t) p1_min_pixel_chunk_bytes) … in dml_rq_dlg_get_rq_reg()
110 rq_regs->rq_regs_l.meta_chunk_size = (dml_uint_t)(dml_log2((dml_float_t) meta_chunk_bytes) - 10); in dml_rq_dlg_get_rq_reg()
111 …rq_regs->rq_regs_c.meta_chunk_size = (dml_uint_t)(dml_log2((dml_float_t) p1_meta_chunk_bytes) - 10… in dml_rq_dlg_get_rq_reg()
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H A Ddisplay_mode_util.c218 void dml_print_data_rq_regs_st(const dml_display_plane_rq_regs_st *rq_regs) in dml_print_data_rq_regs_st() argument
222 dml_print("DML: chunk_size = 0x%x\n", rq_regs->chunk_size); in dml_print_data_rq_regs_st()
223 dml_print("DML: min_chunk_size = 0x%x\n", rq_regs->min_chunk_size); in dml_print_data_rq_regs_st()
224 dml_print("DML: meta_chunk_size = 0x%x\n", rq_regs->meta_chunk_size); in dml_print_data_rq_regs_st()
225 dml_print("DML: min_meta_chunk_size = 0x%x\n", rq_regs->min_meta_chunk_size); in dml_print_data_rq_regs_st()
226 dml_print("DML: dpte_group_size = 0x%x\n", rq_regs->dpte_group_size); in dml_print_data_rq_regs_st()
227 dml_print("DML: mpte_group_size = 0x%x\n", rq_regs->mpte_group_size); in dml_print_data_rq_regs_st()
228 dml_print("DML: swath_height = 0x%x\n", rq_regs->swath_height); in dml_print_data_rq_regs_st()
229 dml_print("DML: pte_row_height_linear = 0x%x\n", rq_regs->pte_row_height_linear); in dml_print_data_rq_regs_st()
233 void dml_print_rq_regs_st(const dml_display_rq_regs_st *rq_regs) in dml_print_rq_regs_st() argument
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H A Ddml_display_rq_dlg_calc.h43 void dml_rq_dlg_get_rq_reg(dml_display_rq_regs_st *rq_regs,
H A Ddml2_translation_helper.h38 void dml2_update_pipe_ctx_dchub_regs(struct _vcs_dpi_dml_display_rq_regs_st *rq_regs, struct _vcs_d…
H A Ddml2_internal_types.h64 struct _vcs_dpi_dml_display_rq_regs_st rq_regs; member
H A Ddisplay_mode_util.h54 __DML_DLL_EXPORT__ void dml_print_rq_regs_st(const dml_display_rq_regs_st *rq_regs);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ !
H A Ddisplay_rq_dlg_calc_32.c43 void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs, in dml32_rq_dlg_get_rq_reg() argument
72 memset(rq_regs, 0, sizeof(*rq_regs)); in dml32_rq_dlg_get_rq_reg()
98 rq_regs->rq_regs_l.chunk_size = dml_log2(pixel_chunk_bytes) - 10; in dml32_rq_dlg_get_rq_reg()
99 rq_regs->rq_regs_c.chunk_size = dml_log2(p1_pixel_chunk_bytes) - 10; in dml32_rq_dlg_get_rq_reg()
102 rq_regs->rq_regs_l.min_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
104 rq_regs->rq_regs_l.min_chunk_size = dml_log2(min_pixel_chunk_bytes) - 8 + 1; in dml32_rq_dlg_get_rq_reg()
107 rq_regs->rq_regs_c.min_chunk_size = 0; in dml32_rq_dlg_get_rq_reg()
109 rq_regs->rq_regs_c.min_chunk_size = dml_log2(p1_min_pixel_chunk_bytes) - 8 + 1; in dml32_rq_dlg_get_rq_reg()
111 rq_regs->rq_regs_l.meta_chunk_size = dml_log2(meta_chunk_bytes) - 10; in dml32_rq_dlg_get_rq_reg()
112 rq_regs->rq_regs_c.meta_chunk_size = dml_log2(p1_meta_chunk_bytes) - 10; in dml32_rq_dlg_get_rq_reg()
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H A Ddisplay_rq_dlg_calc_32.h44 void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dcn10/ !
H A Ddcn10_hw_sequencer_debug.c206 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; in dcn10_get_rq_states() local
213 …pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expan… in dcn10_get_rq_states()
214 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size, in dcn10_get_rq_states()
215 rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size, in dcn10_get_rq_states()
216 rq_regs->rq_regs_l.min_meta_chunk_size, rq_regs->rq_regs_l.dpte_group_size, in dcn10_get_rq_states()
217 rq_regs->rq_regs_l.mpte_group_size, rq_regs->rq_regs_l.swath_height, in dcn10_get_rq_states()
218 …rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_ch… in dcn10_get_rq_states()
219 rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size, in dcn10_get_rq_states()
220 rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size, in dcn10_get_rq_states()
221 rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear); in dcn10_get_rq_states()
/linux/drivers/gpu/drm/amd/display/dc/dml/ !
H A Ddisplay_rq_dlg_helpers.h40 …regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_data_rq_regs_st *rq_regs);
41 …__rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_rq_regs_st *rq_regs);
H A Ddisplay_mode_lib.h65 display_rq_regs_st *rq_regs,
76 void (*rq_dlg_get_rq_reg_v2)(display_rq_regs_st *rq_regs,
H A Ddml1_display_rq_dlg_calc.h35 struct _vcs_dpi_display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ !
H A Ddisplay_rq_dlg_calc_314.h44 display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ !
H A Ddisplay_rq_dlg_calc_20.h45 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_20v2.h45 display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ !
H A Ddisplay_rq_dlg_calc_31.h43 display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ !
H A Ddisplay_rq_dlg_calc_30.h43 display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ !
H A Ddisplay_rq_dlg_calc_21.h46 display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ !
H A Dmem_input.h109 struct _vcs_dpi_display_rq_regs_st *rq_regs,
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/inc/ !
H A Ddml_top_dchub_registers.h149 struct dml2_display_rq_regs rq_regs; member
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn10/ !
H A Ddcn10_hubp.h826 struct _vcs_dpi_display_rq_regs_st rq_regs; member
877 struct _vcs_dpi_display_rq_regs_st *rq_regs);
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn30/ !
H A Ddcn30_hubp.h279 struct _vcs_dpi_display_rq_regs_st *rq_regs,