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Searched refs:relaxed_ordering_write (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_common.c43 bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write); in mlx5e_mkey_set_relaxed_ordering()
49 MLX5_SET(mkc, mkc, relaxed_ordering_write, ro_write); in mlx5e_mkey_set_relaxed_ordering()
/linux/drivers/infiniband/hw/mlx5/
H A Dumr.h63 MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) && in mlx5r_umr_can_reconfig()
H A Dmr.c76 if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write)) in set_mkc_access_pd_addr_fields()
77 MLX5_SET(mkc, mkc, relaxed_ordering_write, 1); in set_mkc_access_pd_addr_fields()
787 MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write) && in get_unchangeable_access_flags()
H A Dumr.c455 MLX5_SET(mkc, seg, relaxed_ordering_write, in mlx5r_umr_set_access_flags()
H A Dmain.c3478 if (MLX5_CAP_GEN(dev->mdev, relaxed_ordering_write)) { in mlx5_ib_create_data_direct_resources()
3479 MLX5_SET(mkc, mkc, relaxed_ordering_write, 1); in mlx5_ib_create_data_direct_resources()
/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Dparams.c877 bool ro = MLX5_CAP_GEN(mdev, relaxed_ordering_write); in rq_end_pad_mode()
/linux/include/linux/mlx5/
H A Dmlx5_ifc.h1691 u8 relaxed_ordering_write[0x1]; member
4486 u8 relaxed_ordering_write[0x1]; member