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Searched refs:reg_table (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/hv/
H A Dmshv_vtl_main.c513 } reg_table[] = { variable
578 for (i = 0; i < ARRAY_SIZE(reg_table); i++) { in mshv_vtl_get_set_reg()
579 if (reg_table[i].reg_name != gpr_name) in mshv_vtl_get_set_reg()
581 if (reg_table[i].debug_reg_num != -1) { in mshv_vtl_get_set_reg()
587 native_set_debugreg(reg_table[i].debug_reg_num, *reg64); in mshv_vtl_get_set_reg()
589 *reg64 = native_get_debugreg(reg_table[i].debug_reg_num); in mshv_vtl_get_set_reg()
593 wrmsrl(reg_table[i].msr_addr, *reg64); in mshv_vtl_get_set_reg()
595 rdmsrl(reg_table[i].msr_addr, *reg64); in mshv_vtl_get_set_reg()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.c1453 struct atom_mc_reg_table *reg_table) in amdgpu_atombios_init_mc_reg_table() argument
1461 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in amdgpu_atombios_init_mc_reg_table()
1490 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table()
1492 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table()
1498 reg_table->last = i; in amdgpu_atombios_init_mc_reg_table()
1504 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in amdgpu_atombios_init_mc_reg_table()
1507 for (i = 0, j = 1; i < reg_table->last; i++) { in amdgpu_atombios_init_mc_reg_table()
1508 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table()
1509 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table()
1512 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
[all …]
H A Damdgpu_atombios.h180 struct atom_mc_reg_table *reg_table);
/linux/drivers/net/wireless/mediatek/mt7601u/
H A Dinitvals_phy.h264 static const struct reg_table { struct
H A Dphy.c291 const struct reg_table *t; in mt7601u_load_bbp_temp_table_bw()
303 const struct reg_table *t; in mt7601u_bbp_temp()
/linux/sound/soc/codecs/
H A Dmt6660.c224 struct reg_table { struct
230 static const struct reg_table mt6660_setting_table[] = { argument
/linux/drivers/media/i2c/
H A Dimx214.c506 const struct cci_reg_sequence *reg_table; member
513 .reg_table = mode_4096x2304,
520 .reg_table = mode_1920x1080,
1159 ret = cci_multi_reg_write(imx214->regmap, mode->reg_table, in imx214_start_streaming()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c3975 struct atom_mc_reg_table *reg_table) in radeon_atom_init_mc_reg_table() argument
3983 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in radeon_atom_init_mc_reg_table()
4012 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table()
4014 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table()
4020 reg_table->last = i; in radeon_atom_init_mc_reg_table()
4026 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in radeon_atom_init_mc_reg_table()
4029 for (i = 0, j = 1; i < reg_table->last; i++) { in radeon_atom_init_mc_reg_table()
4030 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table()
4031 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table()
4034 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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H A Dradeon.h347 struct atom_mc_reg_table *reg_table);
/linux/drivers/gpu/drm/i915/
H A Di915_cmd_parser.c840 const struct drm_i915_reg_descriptor *reg_table, in check_sorted() argument
848 u32 curr = i915_mmio_reg_offset(reg_table[i].addr); in check_sorted()