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Searched refs:regUVD_DPG_LMA_CTL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Djpeg_v4_0_5.c38 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX
H A Dvcn_v4_0_5.c43 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX
H A Dvcn_v4_0_3.c42 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX
H A Dvcn_v4_0.c43 #define mmUVD_DPG_LMA_CTL_BASE_IDX regUVD_DPG_LMA_CTL_BASE_IDX
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1081 #define regUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_5_0_0_offset.h961 #define regUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_4_0_5_offset.h1134 #define regUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_4_0_0_offset.h1161 #define regUVD_DPG_LMA_CTL_BASE_IDX 1 macro
H A Dvcn_4_0_3_offset.h1092 #define regUVD_DPG_LMA_CTL_BASE_IDX 1 macro