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Searched refs:regSMU_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_5_0_offset.h1669 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_6_0_offset.h623 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h824 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h1793 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h407 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h1648 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h430 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1028 #define regSMU_INTERRUPT_CONTROL_BASE_IDX … macro